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时间: 2020-1-10 13:01
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presentationofDDRdesignconsiderationDDRSystemDesignConsiderationsIntegratedTechnologyGroupMicron1DDROverview2SSTL2SignalLevelsDriverReceiverDecember,003SSTL2DoubleEndedTerminationVTTTerminationIslandVTT/VREFGeneratorSSTL_2Address/CmndChipSelectsPC266SDRAMReg.DIMMChipset“NorthBridge”SSTL_2PC266SDRAMReg.DIMMAddress/CommandVTTTerminationIslandData/Strobe/MaskDecember,004SSTL2SingleEndedTerminationVTT/VREFGeneratorSSTL_2Address/CmndChipSelectsChipset“NorthBridge”SSTL_2PC266SDRAMReg.DIMMPC266SDRAMReg.DIMMAddress/CommandVTTTerminationIslandData/Strobe/MaskDecember,005UseSingleParallelTerminationResistorWithSeriesResistormLowersystemcostmEasiermotherboardroutemImprovedbandwidthmLowerskewduet……