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Abstract:High-speedapplicationsusingultra-fastdataconvertersintheirdesignoftenrequireanextremelycleanclocksignaltomakesureanexternalclocksourcedoesnotcontributeundesirednoisetotheoveraldynamicperformanceofthesystem.Itisthereforecrucialtoselectsuitablesystemcomponents,whichhelpgeneratealowphase-jitterclock.Thefollowingapplicationnoteservesasavaluableguideforselectingtheappropriatecomponentstodesignalow-phasenoisePLL-basedclockgenerator,suitableforultra-fastdataconverters.Maxim>AppNotes>A/DandD/ACONVERSION/SAMPLINGCIRCUITSHIGH-SPEEDSIGNALPROCESSINGKeywords:high-speedADCs,high-speedanalogtodigitalconverter,PLL,VCO,phase-lockedloop,voltage-Nov20,2001controlledoscillator,lowphasenoise,lowphasejitter,clockjitter,crystaloscillator,noise,SNR,spuriouscomponents,analogdigital,dataconvertersAPPLICATIONNOTE800DesignaLow-JitterClockforHigh-SpeedDataConvertersAbstract:High-speedapplicationsusingultra-fastdataconvertersintheirdesignoftenrequireanextremelycleanclocksignaltomakesureanexternalclocksourcedoesnotcontributeundesirednoisetotheoveraldynamicperformanceofthesystem.Itisthereforecrucialtoselectsuitablesystemcomponents,whichhelpgene……