所需E币: 3
时间: 2019-12-24 22:19
大小: 156.58KB
ISLA11xP50OutputDataTimingandSynchronizationApplicationNote1604ISLA11xP50OutputDataTimingandSynchronizationOverviewThisdocumentisintendedtoprovidebasicguidanceontheISLA11xP50’soutputtimingandsynchronizationCapturingdatafromtheISLA11xP50ADCiseasilymethods.accomplishedwithcurrentFPGAtechnology.Thesource-synchronousLVDSinterfaceprovidesDDRoutputdataatupto500MHzwitha250MHzclock.TheclockandOutputTimingdataarealignedwithin±250psprovidingawide……