标签: 74

74系列芯片功能略表

本资源内容概要:这是基于51单片机的水温控制设计,包含了proteus电路仿真文件、C语言程序源代码（keil软件打开）。本资源适合人群：单片机爱好者、电子类专业学生、电子diy爱好者。本资源能学到什么：可以通过查看电路学习电路设计原理，查看代码学习代码编写原理。本资源使用建议：建议使用者需要具备一定电子技术基础，掌握一些常用元器件原理，例如三极管、二极管、数码管、电容、稳压器等。了解C语言基础设计原理，能看懂基础的电路图，具备一定的电路图软件使用能力。

例7-4用接收完成中断接收数据

【实验74】密码锁（掉电可记忆密码）.zip

3208748_Linux操作系统与实训(Centos7.4&RHEL7.4).pdf

74系列芯片参数讲解

arm公司设计的内核在电子产品MCU中仍占据主流，其设计的armcortex内核有多个系列，根据产品设计需求选择相应的类型，而Cortex-M系列是面向具有确定性的微控制器应用的成本敏感型解决方案，分享关于Cortex-M3的综合性讲解资料，欢迎下载阅读。

7_4并联谐振电路.ppt

74.调用动态链接库6-LabVIEW中对C语言指针的处理.doc

74LS258.pdfTRI-STATEQuad2-DataSelectorsMultiplexers54LS257ADM54LS257BDM74LS257B54LS258ADM54LS258BDM74LS258BJune198954LS257ADM54LS257BDM74LS257B54LS258ADM54LS258BDM74LS258BTRI-STATEQuad2-DataSelectorsMultiplexersGeneralDescriptionFeaturesThes……

74LS670.pdf54LS670DM54LS670DM74LS670TRI-STATE4-by-4RegisterFilesJune198954LS670DM54LS670DM74LS670TRI-STATE4-by-4RegisterFilesGeneralDescriptionTheseregisterfilesareorganizedas4wordsof4bitseachandthereadtime(24nstypical)Theregisterfilehasanon-andseparateon-chipdecodingisprovidedforaddressingvolatilereadoutinthatdataisnotlostwhenaddressedthefourwordlocat……

74LS651.pdfSN54LS651THRUSN54LS653SN74LS651THRUSN74LS653OCTALBUSTRANSCEIVERSANDREGISTERSSDLS191A……

74LS688.pdfIMPORTANTNOTICETexasInstrumentsanditssubsidiaries(TI)reservetherighttomakechangestotheirproductsortodiscontinueanyproductorservicewithoutnotice,andadvisecustomerstoobtainthelatestversionofrelevantinformationtoverify,beforeplacingorders,thatinformationbeingreliedoniscurrentandcomplete.Allproductsaresoldsubjecttothetermsandconditionsofsalesuppliedatthetimeoforderacknowledgement,includingthosepertainingtowarranty,patentinfringement,andlimitationofliability.TIwarrantsperformanceofitssemiconductorproductstothespecificationsapplicableatthetimeofsaleinaccordancewithTI’sstandardwarranty.Testingandotherqualitycontroltechniquesareutil……

74LS379.pdf54LS379DM74LS379QuadParallelRegisterwithEnableJune198954LS379DM74LS379QuadParallelRegisterwithEnableGeneralDescriptionFeaturesTheLS379isa4-bitregisterwithbufferedcommonEnableYEdge-triggeredD-typeinputsThisdeviceissimilartotheLS175butfeaturesthecommonYBufferedpositiveedge-triggeredclockEnableratherthancommonMasterReset……

74LS365.pdf54LS365ADM54LS365ADM74LS365AHexTRI-STATEBuffersJune198954LS365ADM54LS365ADM74LS365AHexTRI-STATEBuffersGeneralDescriptionThisdevicecontainssixindependentgateseachofwhichthattwooutputswillattempttotakeacommonbustooppo-performsanon-invertingbufferfunctionTheoutputshavesitelogiclevelsthedisabletimeisshorterthantheenabletheTRI-STATEfeatureWhenenabledtheoutputsexhi……

74LS352.pdf54LS352DM74LS352Dual4-Lineto1-LineDataSelectorsMultiplexersJune198954LS352DM74LS352Dual4-Lineto1-LineDataSelectorsMultiplexersGeneralDescriptionEachofthesedataselectorsmultiplexerscontainsinvert-YPerformsparallel-to-serialconversionersanddriverstosupplyfullycomplementaryon-chipbi-YStrobe(enable)lineprovidedforcascading(NlinestonarydecodingdataselectiontotheAND-OR-invertgatesnlines)Separate……

74LS283.pdf54LS283DM54LS283DM74LS2834-BitBinaryAdderswithFastCarryJune198954LS283DM54LS283DM74LS2834-BitBinaryAdderswithFastCarryGeneralDescriptionFeaturesThesefulladdersperformtheadditionoftwo4-bitbinaryYFull-carrylook-aheadacrossthefourbitsnumbersThesum(R)outputsareprovidedforeachbitandYSystemsachievepartiallook-aheadperformancewiththeresultantcarry(C4)isobtainedfromthefourthbit……

74LS279.pdf54LS279DM54LS279DM74LS279QuadS-RLatchesMay198954LS279DM54LS279DM74LS279QuadS-RLatchesGeneralDescriptionThe’LS279consistsoffourindividualandindependentSet-tobeindeterminateBothinputsarevoltageleveltriggeredResetLatcheswithactivelowinputsTwoofthefourlatch-andarenotaffectedbytransitiontimeoftheinputdataeshaveanadditonalSinputANDedwiththeprimarySinputA……

74LS367.pdf54LS367ADM54LS367ADM74LS367AHexTRI-STATEBuffersMay198954LS367ADM54LS367ADM74LS367AHexTRI-STATEBuffersGeneralDescriptionThisdevicecontainssixindependentgateseachofwhichthattwooutputswillattempttotakeacommonbustooppo-performsanon-invertingbufferfunctionTheoutputshavesitelogiclevelsthedisabletimeisshorterthantheenabletheTRI-STATEfeatureWhenenabledth……

74LS256.pdf54LS256DM74LS256Dual4-BitAddressableLatchJune198954LS256DM74LS256Dual4-BitAddressableLatchGeneralDescriptionThe’LS256isadual4-bitaddressablelatchwithcommoncouldimposeatransientwrongaddressThereforethiscontrolinputstheseincludetwoAddressinputs(A0A1)shouldbedoneonlywhileinthememorymode(EeCLeanactiveLOWenableinput(E)andanactiveLOWClearHIGH)input(CL)EachlatchhasaDatainput(D)andfouroutpu……