标签: power

一、简介 1.Tableau Tableau 是一个 BI 分析和可视化工具。它为分析数据和创建交互式可视化提供了强大的功能。Tableau 旨在支持复杂的数据科学和分析，让数据专家可以使用一系列可视化工具构建分析。 2.Power BI Power BI 是 Microsoft 的产品，因此它的使用和集成可以很好地融入到整个Microsoft Office套件中。这既是一个好处，也是一个缺点。熟悉高级 Office 工具的用户会发现 Power BI某些功能可能具有陡峭的学习曲线，并且不如市场上的其他工具强大。 Microsoft 的 Power BI 专注于分析。这意味着虽然它可以支持分析和基本的 BI 功能，但用户需要结合其他工具才能从中获得真正的 BI 功能，包括集成数据源、建立数据架构以及与业务用户和外部相关者共享数据。 3.Domo Domo（HK-Domo）是虹科引进的一款将所有数据、BI和工作流都整合到应用程序中的综合性商业智能（BI）分析工具，全球有2000+知名企业正在使用Domo。Domo功能非常强大，其具有可定制、实时性、交互性的自助仪表板，有1000+接口实现数据集成，在Domo平台上可以构建自定义应用程序并通过Buzz实现共享和聊天功能，Domo具有云灵活性、能够进行异常管理、嵌入式分析、拥有世界一流的数据治理和安全性。从可视化到数据应用程序，Domo帮助企业简化数据集成、提供数据洞察力、优化业务决策、实现多场景数据共享，助力企业数据上云与数字化转型升级！ （1）关键功能： 数据整合：连接、合并、转换、查询数据 数据可视化：报告和仪表板、自助分析、数据科学、协作洞察 数据应用：数千个数据应用程序和连接器、创建低代码的高级应用 嵌入式分析：创建和编辑可视化、连接外部数据、获取高级数据见解 安全与治理：个性化数据治理、自带密钥 (BYOK)加密的安全架构 云服务：与云数据仓库集成、实时响应数十亿行查询 （2）优势： 直观且易用的综合性平台 轻松连接数据的云灵活性 无需编码的个性化仪表板和报告 出色的数据集成 可共享的自定义数据应用程序 世界级的数据治理 (3)应用场景：适用于任何行业的企业数据应用场景 角色：BI团队、IT团队、营销、销售、财务、运营 行业：金融、制造、高科技、零售、媒体服务、生命科学 4.Qlik Qlik Active Intelligence Platform 于 1993 年在瑞典成立，是一个由 AI 驱动的端到端、基于云的分析和数据集成平台。该平台包含两套产品：数据集成和分析。每个产品都旨在连接来自跨业务渠道的数据，并将其交到用户手中，以实现实时、快速的洞察和行动。 二、功能对比 1.Tableau和Domo 2.Domo与Power BI 3.Qlik与Domo 企业可以根据自己的需求对比分析确定选择哪个BI工具！

曾经在网易博客发过一篇《 关于 E-studio 软件的详细说明 》（链接地址： http://qijie72.blog.163.com/blog/static/28183629200911532922369/ ） 发现有很多的网友关注这块，现抽时间再次整理归纳出一些细节性问题，并重新提供一个 E-studio 软件的下载链接。在这里基础的操作就不再过多重复描述，不清楚的可以通过上面的链接地址去我的网易博客查看原文。 这个 E-studio 软件本人已在 XP 和 win7 系统上测试验证是完全可用的，其他系统上本人尚未测试过，大家可以自行安装测试验证。 部分电脑在安装 E-studio 的过程中，会出现提示丢失 mgc_ddp8_9.dll 等 dll 文件需要重启安装时候，此时不用重启电脑，只需要将文件夹里的 license 文件复制到你的安装目录下覆盖原文件，然后点击确定继续安装直到完成即可。 E-studio 安装完毕后，将 发送到桌面快捷方式，然后双击该图标，可以正常打开软件即表示安装成功。 使用 PADS9.5 打开绘制的原理图 导出 TXT 文本，第一个选项全选，注意输出版本的选择， 2007 以上版本 E-studio 均无法打开，只可以选 2005 或者 2005.2 版本。 建议 最好选择 2005.2 版，如果输出 2005 版，在 E-studio 里打开该文件后，有时会有无法另存为 ASC 文件的情况出现。 将导出的 TXT 文件的第一排文字修改成 “ *PADS-POWERLOGIC-V4.0* DESIGN EXPORT FILE FROM PADS LOGIC V4.0 ”， 并保存。 使用 E-studio 软件直接打开刚保存的这个 TXT 文件。 另存为 DSN 文件后就可以 直接使用 OR CAD 软件打开了。 最后对一些字符、端口等发生堆叠的地方稍做适当调整即可。 几点注意事项： 部分电脑以及部分设计文件， 使用 PADS9.5 版导出 TXT 文件后， 在 E-studio 里打开时 ，有可能会提示如下错误 “ ERROR has occurred during PADS reader execution ” 如果出现这种情况，只需要再安装一个 PADS2005 版软件，将 PADS9.5 导出的 TXT 文件导入 2005 版里，再次导出 2004.X 文件使用即可。注意记得删除掉那些多出来的边框等东东。 在 E-studio 里打开后，注意另存为的 DSN 文件不能直接保存到桌面，否则，将会无法保存，一定要另外指定一个地方保存。 重新给大家提供一个 E-studio 软件的下载链接： https://pan.baidu.com/s/1m-Cn6fsyah9RBkYKp3KZeA 密码： 0ko7 以上内容均属本人实际使用经验，希望能对有需要的朋友有所帮助 . 刚才偶尔百度了一下，发现本人前面的那篇关于 E-studio 软件的详细说明 》博文，被很多的网友转载了，不过有个别人转载过去后却要求人家付费下载，强烈鄙视这种小人！ 最后，大家如有其他更好的转换方法，也请互相交流学习！

Estimating likely power consumption of a piece of silicon before building it is necessarily an approximate endeavor -- not quite divining the future by poking through chicken bones, but certainly laden with assumptions and approximations. Unfortunately, early estimates are critical to the economic and timely development of world-class designs. You can't just iterate through design, manufacture, and measurement as many times as it takes to get it right.   The gold-standard of pre-silicon estimation starts from a full physical gate-level implementation -- synthesized to final gates and placed-and-routed. Using this representation, with detailed power models for gates, extracted parasitics, and activity files from gate-level simulation, power estimates are claimed to fall within 5% of silicon measurements (with multiple caveats). However, a full implementation cycle takes time (enough time that you are not going to complete more than one a day for a ~1M gate block), and it is difficult to correlate power problems back to the RTL design. So, while an improvement over waiting for silicon, this method is still not well-suited to rapid design-measure-debug iteration.   The electronic system level (ESL) may be the best place to estimate and optimize architecture for power, but either way you have to re-estimate at the RTL (register transfer level) to get the implementation architecture right. This offers the fastest and most direct debug cycle, but with a penalty in accuracy over gate-level estimation. RTL estimation still uses the same Liberty power models used in gate-level estimation and the same simulation testbench, but takes a scientific wild-ass guess (SWAG) at what gates will be mapped to in synthesis, Vth mixes, cell drives, data path optimization, net capacitances, and more. Still, for many purposes at less aggressive nodes, this approach can provide useful guidelines to major implementation decisions.     While basic estimates are often reasonably accurate in terms of overall power, they don't typically stand up well to close examination. If you want to understand, for example, static versus dynamic power components or contributions by module or contributions of memories versus the clock tree, basic analysis can be significantly off. One way to get significant improvement is to calibrate the SWAG estimates against a fully-implemented version of an earlier generation/similar design. Unsurprisingly, mapping Vth mix, drive strengths, capacitance models, and clock trees by clock domains can significantly tighten up estimates at the detail level.   But what if you are working on a new design and you don't have prior examples to guide calibration? Or what if you want to optimize for power at the micro-architectural level -- for example, splitting high-fanout nets and pipelining? To usefully guide decisions in these cases means the estimation tool has to more closely emulate a real implementation flow. In turn, this means close correlation on cell selection module-by-module -- not just threshold mix, but also DesignWare selections. It also means close correlation on drive strengths, interconnect capacitances, and clock tree implementation, all of which require some form of physical prototyping. The trick here is to get a reasonable level of accuracy faster than you can through a full implementation cycle, so you can run through multiple design-measure-debug cycles in one day. Some approximations can be made to help achieve this speed, but your vendor still needs to provide a credible case that they can accomplish reasonable correlation with the real implementation flow.   Getting to really useful RTL power estimation is hard work. We are constantly refining correlation at the component level (static versus dynamic), at the module level, and at the detailed architectural level. If you have additional ideas or feedback on the limitations in RTL power estimation, I'd be very interested to hear them.   Bernard Murphy CTO Atrenta Inc.

Universal Serial Bus (USB) is ubiquitous. What if you were given an option to just carry a USB cable, as against a bunch of power adapters to charge your tablet, ultrabook and smartphone? Sounds too good to be true, right?   In August 2012 USB Implementers Forum (the governing body for USB Standard) released a specification—USB Power Delivery (USB PD) that will allow up to 100W of power to be delivered over USB’s power pin!   The new standard (USB PD) allows interconnected devices to negotiate power requirements, and allows devices with abundant power to share it with other devices in the network. Devices like monitors, docking stations, printers and PD-enabled power adapters will source power through their USB ports. Gone will be the days when your power adapter had a custom barrel plug for a dedicated notebook! The power adapters of the future will sport USB ports to charge your devices, including notebooks.   Industry leaders have started working on these lines and come 2014 will see your device’s USB ports supplying higher levels of power. The new standard will co-exist with existing USB eco-system and work equally well with USB 2.0 and USB 3.0.    - Subramanyam Sankaran, Director, USB 2.0 Business Unit, Data Communication Division, Cypress Semiconductor   Subramanyam SankaranIn his current role, Subramanyam Sankaran manages USB 2.0 business for the worldwide market. Subramanyam has been associated with the semiconductor industry for 17 years and has been involved with USB for 14.   Subramanyam has previously worked with Philips/NXP Semiconductors, ST-Ericssion and Maxim in various marketing and engineering management roles.   Subramanyam received his management degree from University of Phoenix and his undergraduate degree in electronics and communication engineering from Bangalore University.

Universal Serial Bus (USB) is ubiquitous. What if you were given an option to just carry a USB cable, as against a bunch of power adapters to charge your tablet, ultrabook and smartphone? Sounds too good to be true, right?   In August 2012 USB Implementers Forum (the governing body for USB Standard) released a specification—USB Power Delivery (USB PD) that will allow up to 100W of power to be delivered over USB’s power pin!   The new standard (USB PD) allows interconnected devices to negotiate power requirements, and allows devices with abundant power to share it with other devices in the network. Devices like monitors, docking stations, printers and PD-enabled power adapters will source power through their USB ports. Gone will be the days when your power adapter had a custom barrel plug for a dedicated notebook! The power adapters of the future will sport USB ports to charge your devices, including notebooks.   Industry leaders have started working on these lines and come 2014 will see your device’s USB ports supplying higher levels of power. The new standard will co-exist with existing USB eco-system and work equally well with USB 2.0 and USB 3.0.   - Subramanyam Sankaran, Director, USB 2.0 Business Unit, Data Communication Division, Cypress Semiconductor In his current role, Subramanyam Sankaran manages USB 2.0 business for the worldwide market. Subramanyam has been associated with the semiconductor industry for 17 years and has been involved with USB for 14.   Subramanyam has previously worked with Philips/NXP Semiconductors, ST-Ericssion and Maxim in various marketing and engineering management roles.   Subramanyam received his management degree from University of Phoenix and his undergraduate degree in electronics and communication engineering from Bangalore University.