原创 读书机，点读机，原理分析 （3） IC

stk86c1051 的特点：

             双操作时钟：32。768khz或0.5s的时间中断。

             2k的ram

             Address up to 8Mbyte use 1Mbyte and 16kbyte inside ROM.

             嵌入解压/识别机

              声音录音重放

              16位DA，8位的AD

               rom程序空间：

              4000～7fff :存放数据空间

              c000~ffff: 存放系统程序和用户程序。

              fff0,fff1: 芯片中断向量

              fff2,fff3:AD中断向量

              fff4,fff5: no  use

              fff6,fff7:  定时器中断向量

              fff8,fff9: PA[7:0]中断向量

              fffa,fffb ： 定时器b中断向量

              fffc,fffd: 复位向量。

              fffe,ffff:外部中断向量。 

优先权排列： RES

                          NMI

                          OK_INT

                          ADC_INT

                          TIMER_INT

                          PA_INT

                          EXT_IRQ

      3fe0  系统标识寄存器 只读。

      3fe0  系统控制寄存器0  只写

      3fe1  系统控制寄存器1   只写            

      3fe2  系统控制寄存器2   只写      

      3fe3  pa0~7中断使能寄存器 write only

      3fe4  pa0~7 数据寄存器read and write

      3fe5  pa0~7 方向寄存器

      3fe6  pb0~7 数据寄存器

      3fe7  清除watchdog 寄存器。write only

      3fe8 声音通道0低字节， write only

      3fe9 声音通道0 高字节，write only。

      3fea  页码寄存器 write only

      3feb

      3fec,3fed  定时器a或语音声调品质发生器0 

      3fee    定时器b低字节数据。

      3fef   定时器b高字节。

      3ff0   pa15～8 方向寄存器

      3ff1   pa15~8数据寄存器

      3ff2   pb11~8  数据寄存器

      3ff4 cpu 页码寄存器

3ff5 cpu页码寄存器msb位

      3ff6 pc7~0  数据寄存器

      3ff7 pc15~8 数据寄存器

      3ff8 pc7~0  方向寄存器

      3ff9 pc15~8  方向寄存器

      3ffa ADC 寄存器

      3ffb,3ffc   波特率设定或声调发生器

      3ffd  tx/rx  寄存器

      3ffe      声音通道1和              系统控制3寄存器

      3fff    声音通道1高字节。

//---------------------------------------------------------

rRwCTRL_SYS     EQU     3FE0H           ;System Control Flag register系统标识寄存器 只读。

;{ read

nRxDATA_ERR     EQU     nBIT0_VAL       ; 1 -->      Rx received data error  接受数据错误

                                                                       ; 0 -->     Rx received data no error

nTxDATA_ERR     EQU     nBIT1_VAL       ; 1 -->      Tx overrun  溢出

                                                                      ; 0 -->     Tx not overrun

nADC_ERR        EQU     nBIT2_VAL       ; 1 -->     ADC error

                                                                    ; 0 --> ADC no error

nTMRA_INT       EQU     nBIT3_VAL       ; if (TIMER IRQ) is true -- 1 --> Timer A interrupt

                                                                      ;                           0 --> Fix Timer interrupt

nRx_INT         EQU     nBIT4_VAL       ; If (UART IRQ) is true -- 1 --> Rx interrupt flag

                                        ;                          0 --> Tx interrupt flag 

nCoOP_FLAG_OK   EQU     nBIT5_VAL       ; 1 -->     Coprocessor operation flag is OK 

                                        ; 0 -->     Coprocessor operation flag is not OK  

nCoPRSOR_CARRY  EQU     nBIT6_VAL       ; 1 -->     Coprocessor carry

                                        ; 0 -->     Coprocessor no carry

nTONE_ENA       EQU     nBIT7_VAL       ; 1 -->      Tone flag(enable)

                                        ; 0 -->     Tone flag (disable)

;} end read

;{ write

nUART_ENA       EQU     nBIT0_VAL       ; 1 -->       UART Enable (PA14=RX,PA15=TX)

                                        ; 0 -->     (default) General IO (PA14,PA15)

nEXT_IRQ_ENA    EQU     nBIT1_VAL       ; 1 -->      External IRQ input pin  Enable (PB9) 

                                        ; 0 --> (default) General IO (PB9)

nEXT_RAMCS_ENA  EQU     nBIT2_VAL       ; 1 -->    External RAM CS pin Enable (PB7)     

                                        ; 0 --> (default) General IO (PB7)

nADC_ENA        EQU     nBIT3_VAL       ; 1 -->       ADC input pin Enable (PA13)

                                        ; 0 --> (default) General IO (PA13)

nUART_CLK_ENA   EQU     nBIT4_VAL       ; 1 -->     UART clock Enable

                                        ; 0 -->     (default) UART clock Disable

nGREENVOC_ENA   EQU     nBIT5_VAL       ; 1 -->    Green Voice Enable

                                        ; 0 -->     (default) Green Voice Dsiable

nPWM_ENA        EQU     nBIT6_VAL       ; 1 -->     PWM Voice Enable

                                        ; 0 --> (default) PWM Voice Disable

nDAC_ENA        EQU     nBIT7_VAL       ; 1 -->       DAC Enable

                                        ; 0 --> (default) DAC Disable

;} end write

rWoCTRL_TMR     EQU     3FE1H           ;Timer and clock control register

;{

nTMACLK_SYSCLK  EQU     nBIT0_VAL       ; 1 -->    Timer A clock select system clock

                                        ; 0 -->     (default) Timer A clock select 32.768KHz

nUARTCLK_SYSCLK EQU     nBIT1_VAL       ; 1 -->     UART clock select system clock

                                        ; 0 -->     (default) UART clock select 32.768KHz

nTMRA_ENA       EQU     nBIT2_VAL       ; 1 -->      Timer A Enable      

                                        ; 0 -->     (default) Timer A Disable

nTMRB_ENA       EQU     nBIT3_VAL       ; 1 -->      Timer B Enable     

                                        ; 0 -->     (default) Timer B Disable

nTMRA_INT_ENA   EQU     nBIT4_VAL       ; 1 -->     Timer A interrupt Enable

                                        ; 0 -->     (default) Timer A interrupt Disable

nTMRB_INT_ENA   EQU     nBIT5_VAL       ; 1 -->     Timer B NMI Enable     

                                        ; 0 --> (default) Timer B NMI Disable

nSYSCLK_32K     EQU     nBIT6_VAL       ; 1 -->       System Clock = 32.768KHz

                                        ; 0 -->     (default) System Clock = PLL clock

nWDT_ENA        EQU     nBIT7_VAL       ; 1 -->      (default) WatchDog Timer Enable

                                        ; 0 -->     WatchDog Timer Disable

;}

rWoCTRL_FIXPWR  EQU     3FE2H           ;Fix timer and power saved mode control register

 <?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" />

;{

nENTRY_STDBY    EQU     nBIT0_VAL               ; 1 -->     Entry stand by mode

nENTRY_SLEEP    EQU     nBIT1_VAL               ; 1 -->      Entry sleep mode

;system clock =  FxOSC/2 x 256     bit 2,3 is zero(default)

nSYS_FxOSCx512  EQU     nBIT2_VAL               ; 0,1 --> PLL Clock = Fxosc/2 x 512(8.38MHz)

nSYS_FxOSCx1024 EQU     nBIT3_VAL               ; 1,0 --> PLL Clock = Fxosc/2 x 1024(16.77MHz)

nSYS_FxOSCx1280 EQU     (nBIT2_VAL+nBIT3_VAL)   ; 1,1 --> PLL Clock = Fxosc/2 x 1280(20.97MHz)

;00   PLL Clock = Fxosc/2 x 256(4.19MHz)

;01   PLL Clock = Fxosc/2 x 512(8.38MHz)

;10   PLL Clock = Fxosc/2 x 1024(16.77MHz)

;11   PLL Clock = Fxosc/2 x 1280(20.97MHz)

;fix timer interrupt disable only bit 7 is zero

nFIX_TMR64Hz    EQU     nBIT7_VAL                       ;1000 FIX timer interrup Clock = 64Hz 

nFIX_TMR32Hz    EQU     (nBIT7_VAL+nBIT4_VAL)           ;1001       FIX timer interrup Clock = 32Hz 

nFIX_TMR16Hz    EQU     (nBIT7_VAL+nBIT5_VAL)           ;1010       FIX timer interrup Clock = 16Hz 

nFIX_TMR8Hz     EQU     (nBIT7_VAL+nBIT5_VAL+nBIT4_VAL) ;1011       FIX timer interrup Clock = 8Hz  

nFIX_TMR4Hz     EQU     (nBIT7_VAL+nBIT6_VAL)           ;1100 FIX timer interrup Clock = 4Hz  

nFIX_TMR2Hz     EQU     (nBIT7_VAL+nBIT6_VAL+nBIT4_VAL) ;1101       FIX timer interrup Clock = 2Hz  

nFIX_TMR1Hz     EQU     (nBIT7_VAL+nBIT6_VAL+nBIT5_VAL) ;1110       FIX timer interrup Clock = 1Hz  

nFIX_TMRd5Hz    EQU     F0H                             ;1111  FIX timer interrupt Clock = 0.5Hz

;1000      FIX timer interrup  Clock = 64Hz                                        

;1001      FIX timer interrup  Clock = 32Hz

;1010      FIX timer interrup  Clock = 16Hz

;1011      FIX timer interrup  Clock = 8Hz

;1100      FIX timer interrup  Clock = 4Hz

;1101      FIX timer interrup  Clock = 2Hz

;1110       FIX timer interrup  Clock = 1Hz

;1111       FIX timer interrupt Clock = 0.5Hz

;0xxx      FIX timer interrupt Disable

;}

rWoINTEN_PA     EQU     3FE3H           ;Port A [7..0] interrupt Enable register

;{

;****default '1' all bits interrupt disable, write '0' bit interrupt enable****

;}

rRwDATA_PA_LO   EQU     3FE4H           ;Port A [7..0] data register

;

rWoCTRL_PA_LO   EQU     3FE5H           ;Port A [7..0] direction register

;{

;****default '0' all bits select input mode, write '1' bit select output mode****

;}

rWoDATA_PB_LO   EQU     3FE6H           ;Port B [7..0] data register

;

rWoCLR_WDT      EQU     3FE7H           ;Watch dog clear register

;

rWoVCH0_LO      EQU     3FE8H           ;Voice channel 0 buffer low byte register

;

rWoVCH0_HI      EQU     3FE9H           ;Voice channel 0 buffer high byte register

;

rWoCoBANK_LO    EQU     3FEAH           ;Bank low byte register for Coprocessor

;

rWoCoBANK_HI    EQU     3FEBH           ;Bank high byte register for Coprocessor

;

rRwTMRAT0_LO    EQU     3FECH           ;Timer A count low byte register or

                                        ;Tone 0 low byte generator

;

rRwTMRAT0_HI    EQU     3FEDH           ;Timer A count high byte register or

                                        ;Tone 0 high byte generator

;

rRwTMRB_LO      EQU     3FEEH           ;Timer B count low byte register

;

rRwTMRB_HI      EQU     3FEFH           ;Timer B count high byte register

;

rWoCTRL_PA_HI   EQU     3FF0H           ;Port A [15..8] direction register

;{

;****default '0' all bits select input mode, write '1' bit select output mode****

;}

rRwDATA_PA_HI   EQU     3FF1H           ;Port A [15..8] data register

;

rWoDATA_PB_HI   EQU     3FF2H           ;Port B [11..8] data register

;

rWoCPUBANK_LO   EQU     3FF4H           ;Bank low byte register for CPU

;

rWoCPUBANK_HI   EQU     3FF5H           ;Bank high byte register for CPU

;{

nBANK_HI        EQU     nBIT0_VAL       ;

nBUFF2DAC_PASS  EQU     nBIT2_VAL       ;Voice Chennal 0 will be transferred  directly to DAC

;if bit 2 is zero , voice channel 0 will be transferred to dac by timer B NMI

;}

rRwDATA_PC_LO   EQU     3FF6H           ;Port C [7..0] data register

;

rRwDATA_PC_HI   EQU     3FF7H           ;Port C [15..8] data register

;

rWoCTRL_PC_LO   EQU     3FF8H           ;Port C [7..0] direction register

;{

;****default '0' all bits select input mode, write '1' bit select output mode****

;}

rWoCTRL_PC_HI   EQU     3FF9H           ;Port C [15..8] direction register

;{

;****default '0' all bits select input mode, write '1' bit select output mode****

;}

rRoDATA_ADC     EQU     3FFAH           ;ADC register

;

rWoBRT1_LO      EQU     3FFBH           ;Baud rate setting low byte register or

                                        ;Tone 1 low byte generator

;

rWoBRT1_HI      EQU     3FFCH           ;Baud rate setting high byte register or

                                        ;Tone 1 high byte generator

;

rRwDATA_RxTx    EQU     3FFDH           ;Tx/Rx register

;{

;Read   -->   Read the received data from Rx buffer

;Write      -->     Load data to Tx buffer for transmisson

;}

rWoVCH1_LO      EQU     3FFEH           ;Voice channel 1 buffer low byte register and

                                        ;voice channel control

;{

nDAC_MIX        EQU     nBIT0_VAL       ; 1 -->      Mix mode for DAC output

                                        ; 0 -->     (default) Separate mode for DAC output

nPWM_MIX        EQU     nBIT1_VAL       ; 1 -->     Mix mode for PWM output

                                        ; 0 -->     (default) Separate mode for PWM output

nTONE0_ENA      EQU     nBIT2_VAL       ; 1 -->      Tone 0 Enable

                                        ; 0 --> (default) Tone 0 Disable

nTONE1_ENA      EQU     nBIT3_VAL       ; 1 -->      Tone 1 Enable

                                        ; 0 -->     Tone 1 Disable

;Bit 4-7         Voice channel 1 low nibble byte

;}

rWoVCH1_HI      EQU     3FFFH           ;Voice channel 1 buffer high byte register