原创 cpld 学习有感安装注意 和学习笔记

1 从网上下载的Quartus ii 如果不破解有30天的试用期，但是编译生不成下载文件。既.pof文件。
2 如何运行着Quartus 进行破解，破解会不成功。必须关闭Quartus后，再进行破解。

3 学习笔记 .......

    Quartus II  Introduction
          Create a Design
                step1: Create a new Project
                step2: Create a Block Design File
                step3: Use the MegaWrizacl
                step4: Create a symbol
                step5: add pins
          Complie a Design
                 step1: specify Compiler Settings
                 step2: Perform a Full Compilation
                 step3: Greate a Pin Assignment
                 step4: View Fitting Results(Chip Planner)
                 step5: Create a Revision
          Run Timing Analysis
                  step1: Open TimeQuest Analyzer       打开时序分析器     
                         1) Open a Quartus II Project           打开一个工程
                         2) Preform Initial Compilation         全编译

                           
                         3) Open the TimeQuest Analyzer    打开时间分析
                  step2: Create a Time Netlist             建立一个时间网络 

                                 Netlist -->Create Timeing Netlist
                  step3: Constrain & Report Clocks    clk报表和约束
                         1) Greate clock constrains

                                constraints -->create clock  =clk name

                                                                           = period

                                                                          = Targets -->Collection= get_ports -->list -->clk -->>
                         2) Updata timing Netlist
                         3) Report clocks 
                  step4: Constrain &Report I'O    i/o口的报表和约束
                         1)Specify max/min input delays       指定max/min的输入延时
                         2) Specify max/min output delays
                         3) updates the timing netlist
                         4) view timing reports
                  step 5: View Detailed Reports     观察详细的报表
                         1) View Summary Reports     摘要报告
                         2) Report Unconstrained Paths  未约束的路径
                         3) View a Slack Histoyram         静态柱状图
                         4) Report Individual Path Timing    个别的时序路径
                  step6: Run Timing Driven Compilation   进行时间激励编辑
                         1) Save the constraints file
                         2) Recompile the design
                         3) View TimeQuest results

          Run Timing Simulation
                  step1 : Create a Waveform File
                  step2: Specify Simulator Settings
                  step3: Run the Simulator
                  step4: View Simulation Results
          Configure a Device
          Advanced Topics