原创 LQ104V1DG52 (10") LTP700WV(7") TFT LCD AT91SAM9261

/// LCD pins list.
#define PINS_LCD    \
    {0x001FFFEF, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}, \
    {0x1FE00000, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT}, \
    {1 << 4,     AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT}

/// Display width in pixels.
#define BOARD_LCD_WIDTH             800

/// Display height in pixels.
#define BOARD_LCD_HEIGHT            480

/// Display resolution in bits per pixel (bpp).
#define BOARD_LCD_BPP               AT91C_LCDC_PIXELSIZE_TWENTYFOURBITSPERPIXEL

/// Display interface width in bits.
#define BOARD_LCD_IFWIDTH           24

/// Frame size in pixels (height * width * bpp).
#define BOARD_LCD_FRAMESIZE_PIXELS  (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT * 24)

/// Frame size in words (height * width * bpp / 32)
#define BOARD_LCD_FRAMESIZE         (BOARD_LCD_FRAMESIZE_PIXELS / 32)

/// Frame rate in Hz.
#define BOARD_LCD_FRAMERATE         60

/// Pixel clock rate in Hz (frameSize * frameRate / interfaceWidth).
#define BOARD_LCD_PIXELCLOCK        (BOARD_LCD_FRAMESIZE_PIXELS * BOARD_LCD_FRAMERATE / BOARD_LCD_IFWIDTH)

/// LCD display type.
#define BOARD_LCD_DISPLAYTYPE       AT91C_LCDC_DISTYPE_TFT

/// LCDC polarity.
#define BOARD_LCD_POLARITY_INVVD    AT91C_LCDC_INVVD_NORMALPOL

/// LCDVSYNC polarity.
#define BOARD_LCD_POLARITY_INVFRAME AT91C_LCDC_INVFRAME_INVERTEDPOL

/// LCDHSYNC polarity.
#define BOARD_LCD_POLARITY_INVLINE  AT91C_LCDC_INVLINE_INVERTEDPOL

/// LCDDOTCLK polarity.
#define BOARD_LCD_POLARITY_INVCLK   AT91C_LCDC_INVCLK_INVERTEDPOL

/// LCDDEN polarity.
#define BOARD_LCD_POLARITY_INVDVAL  AT91C_LCDC_INVDVAL_NORMALPOL

/// Pixel clock mode.
#define BOARD_LCD_CLOCKMODE         AT91C_LCDC_CLKMOD_ALWAYSACTIVE

///// Vertical front porch in number of lines.
//#define BOARD_LCD_TIMING_VFP        5
//
///// Vertical back porch in number of lines.
//#define BOARD_LCD_TIMING_VBP        8
//
///// Vertical pulse width in LCDDOTCLK cycles.
//#define BOARD_LCD_TIMING_VPW        1+1
//
///// Number of cycles between VSYNC edge and HSYNC rising edge.
//#define BOARD_LCD_TIMING_VHDLY      0+1
//
///// Horizontal front porch in LCDDOTCLK cycles.
//#define BOARD_LCD_TIMING_HFP        3+1
//
///// Horizontal back porch in LCDDOTCLK cycles.
//#define BOARD_LCD_TIMING_HBP        11+1
//
///// Horizontal pulse width in LCDDOTCLK cycles.
//#define BOARD_LCD_TIMING_HPW        3+1

/// Vertical front porch in number of lines.
#define BOARD_LCD_TIMING_VFP        4+1

/// Vertical back porch in number of lines.
#define BOARD_LCD_TIMING_VBP        6+1

/// Vertical pulse width in LCDDOTCLK cycles.
#define BOARD_LCD_TIMING_VPW        1+1

/// Number of cycles between VSYNC edge and HSYNC rising edge.
#define BOARD_LCD_TIMING_VHDLY      0+1

////////////////////////////////////////////////////////////////////////////////

/// Horizontal front porch in LCDDOTCLK cycles.
#define BOARD_LCD_TIMING_HFP        0+1

/// Horizontal back porch in LCDDOTCLK cycles.
#define BOARD_LCD_TIMING_HBP        11+1

/// Horizontal pulse width in LCDDOTCLK cycles. -- 4 CLK
#define BOARD_LCD_TIMING_HPW        2+1+1

//------------------------------------------------------------------------------
/// Configures the PIO needed by the application.
//------------------------------------------------------------------------------
static void ConfigurePins()
{
    static const Pin pins[] = {PINS_LCD};
    PIO_Configure(pins, PIO_LISTSIZE(pins));
}

/// Addresses of the two image buffers
unsigned char *images[2] = {
    (unsigned char *) (AT91C_EBI_SDRAM + 0x00100000),
    (unsigned char *) (AT91C_EBI_SDRAM + 0x00300000)
};

//------------------------------------------------------------------------------
/// Initializes the LCD controller with the board parameters.
//------------------------------------------------------------------------------
void InitializeLcd()
{
    // Enable peripheral clock
    AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_LCDC;

#if defined(at91sam9261)
    AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_HCK1;
#endif

    // Disable the LCD and the DMA
    LCD_DisableDma();
    LCD_Disable(0);

    // Configure the LCD controller
    LCD_SetPixelClock(BOARD_MCK, BOARD_LCD_PIXELCLOCK);
    LCD_SetDisplayType(BOARD_LCD_DISPLAYTYPE);
    LCD_SetScanMode(AT91C_LCDC_SCANMOD_SINGLESCAN);
    LCD_SetBitsPerPixel(BOARD_LCD_BPP);
    LCD_SetPolarities(BOARD_LCD_POLARITY_INVVD,
                      BOARD_LCD_POLARITY_INVFRAME,
                      BOARD_LCD_POLARITY_INVLINE,
                      BOARD_LCD_POLARITY_INVCLK,
                      BOARD_LCD_POLARITY_INVDVAL);
    LCD_SetClockMode(BOARD_LCD_CLOCKMODE);
    LCD_SetMemoryFormat((unsigned int) AT91C_LCDC_MEMOR_LITTLEIND);
    LCD_SetSize(BOARD_LCD_WIDTH, BOARD_LCD_HEIGHT);

    // Configure timings
    LCD_SetVerticalTimings(BOARD_LCD_TIMING_VFP,
                           BOARD_LCD_TIMING_VBP,
                           BOARD_LCD_TIMING_VPW,
                           BOARD_LCD_TIMING_VHDLY);
    LCD_SetHorizontalTimings(BOARD_LCD_TIMING_HBP,
                             BOARD_LCD_TIMING_HPW,
                             BOARD_LCD_TIMING_HFP);

    // Configure contrast (TODO functions)
    LCD_SetContrastPrescaler(AT91C_LCDC_PS_NOTDIVIDED);
    LCD_SetContrastPolarity(AT91C_LCDC_POL_POSITIVEPULSE);
    LCD_SetContrastValue(0x80);
    LCD_EnableContrast();

    // Configure DMA
    LCD_SetFrameSize(BOARD_LCD_FRAMESIZE);
    LCD_SetBurstLength(4);

    // Set frame buffer
    LCD_SetFrameBufferAddress(images[0]);

    // Enable DMA and LCD
    LCD_EnableDma();
    LCD_Enable(0x0C);
}

void main()

{

    // Initialize LCD
    InitializeLcd();

    pPIOB->PIO_SODR = AT91C_PIO_PB4;
}

===================================================================

LQ104V1DG52 -- AT91SAM9261 24 Bits Mode

====================================================================

/// LCD pins list.
#define PINS_LCD    \
    {0x001F9F9F, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_A, PIO_DEFAULT}, \
    {0x1F800000, AT91C_BASE_PIOB, AT91C_ID_PIOB, PIO_PERIPH_B, PIO_DEFAULT}, \
    {1 << 12, AT91C_BASE_PIOA, AT91C_ID_PIOA, PIO_OUTPUT_1, PIO_DEFAULT}
/// Display width in pixels.
#define BOARD_LCD_WIDTH             640
/// Display height in pixels.
#define BOARD_LCD_HEIGHT            480
/// Display resolution in bits per pixel (bpp).
#define BOARD_LCD_BPP               AT91C_LCDC_PIXELSIZE_TWENTYFOURBITSPERPIXEL
/// Display interface width in bits.
#define BOARD_LCD_IFWIDTH           24
/// Frame size in pixels (height * width * bpp).
#define BOARD_LCD_FRAMESIZE_PIXELS  (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT * 24)
/// Frame size in words (height * width * bpp / 32)
#define BOARD_LCD_FRAMESIZE         (BOARD_LCD_FRAMESIZE_PIXELS / 32)
/// Frame rate in Hz.
#define BOARD_LCD_FRAMERATE         60
/// Pixel clock rate in Hz (frameSize * frameRate / interfaceWidth).
#define BOARD_LCD_PIXELCLOCK        (BOARD_LCD_FRAMESIZE_PIXELS * BOARD_LCD_FRAMERATE / BOARD_LCD_IFWIDTH)
/// LCD display type.
#define BOARD_LCD_DISPLAYTYPE       AT91C_LCDC_DISTYPE_TFT
/// LCDC polarity.
#define BOARD_LCD_POLARITY_INVVD    AT91C_LCDC_INVVD_NORMALPOL
/// LCDVSYNC polarity.
#define BOARD_LCD_POLARITY_INVFRAME AT91C_LCDC_INVFRAME_INVERTEDPOL
/// LCDHSYNC polarity.
#define BOARD_LCD_POLARITY_INVLINE  AT91C_LCDC_INVLINE_INVERTEDPOL
/// LCDDOTCLK polarity.
#define BOARD_LCD_POLARITY_INVCLK   AT91C_LCDC_INVCLK_INVERTEDPOL
/// LCDDEN polarity.
#define BOARD_LCD_POLARITY_INVDVAL  AT91C_LCDC_INVDVAL_NORMALPOL
/// Pixel clock mode.
#define BOARD_LCD_CLOCKMODE         AT91C_LCDC_CLKMOD_ALWAYSACTIVE

/*******************************************************************************

VFP: Vertical Front Porch -- 8 Bits => 255+1
In TFT mode, these bits equal the number of idle lines at the end of the frame.

VBP: Vertical Back Porch -- 8 Bits => 255+1

In TFT mode, these bits equal the number of idle lines at the beginning of the frame.

VPW: Vertical Synchronization pulse width -- 6 Bits => 63+1

In TFT mode, these bits equal the vertical synchronization pulse width, given in number of lines.

LCDVSYNC width is equal to (VPW  +1) lines.

*******************************************************************************/

//  V --------    2    ------------------------------------------
//           |_________|                                         |_______________
//
//                     |   34     -------------------------  34  |
//  E ____________________________|         480           |________________________
//

// 34 + 2 + 34 + 480 = 550 H

/// Vertical front porch in number of lines.
#define BOARD_LCD_TIMING_VFP        34

/// Vertical back porch in number of lines.
#define BOARD_LCD_TIMING_VBP        34

/// Vertical pulse width in number of lines.
#define BOARD_LCD_TIMING_VPW        2               //1..34 Lines

/*******************************************************************************

VHDLY: Vertical to horizontal delay

In TFT mode, this is the delay between LCDVSYNC rising or falling edge and LCDHSYNC rising edge. Delay is
(VHDLY   +1) LCDDOTCK cycles.

*******************************************************************************/

/// Number of cycles between VSYNC edge and HSYNC rising edge.
#define BOARD_LCD_TIMING_VHDLY      1

/*******************************************************************************

HBP: Horizontal Back Porch -- 8 Bits => 255+1
Number of idle LCDDOTCK cycles at the beginning of the line. Idle period is (HBP   +1) LCDDOTCK cycles.

HPW: Horizontal synchronization pulse width -- 6 bits => 63+1
Width of the LCDHSYNC pulse, given in LCDDOTCK cycles. Width is (HPW   +1) LCDDOTCK cycles.

HFP: Horizontal Front Porch -- 11 bits => 2047+1
Number of idle LCDDOTCK cycles at the end of the line. Idle period is (HFP   +1) LCDDOTCK cycles.

*******************************************************************************/

// 64 + 80 + 640 + 16 = 800

//  H --------    64   ------------------------------------------
//           |_________|                                         |_______________
//
//                     |   80     -------------------------  16  |
//  E ____________________________|         640           |________________________
//

/// Horizontal front porch in LCDDOTCLK cycles.
#define BOARD_LCD_TIMING_HFP        (16)
/// Horizontal back porch in LCDDOTCLK cycles.
#define BOARD_LCD_TIMING_HBP        (80)
/// Horizontal pulse width in LCDDOTCLK cycles.
#define BOARD_LCD_TIMING_HPW        (64)