原创 HcControl Register

3

1

1

0

0

0

0

0

0

0

0

0

0

1

1

0

9

8

7

6

5

4

3

2

1

0

reserved

R

W

E

R

W

C

I

R

H

C

F

S

B

L

E

C

L

E

I

E

P

L

E

C

B

S

R

CBSR

00b

R/W

R

ControlBulkServiceRatio

This specifies the service ratio between Control and Bulk EDs.  Before processing any of the nonperiodic lists, HC must compare the ratio specified with its internal count on how many nonempty Control EDs have been processed, in determining whether to continue serving another Control ED or switching to Bulk EDs.  The internal count will be retained when crossing the frame boundary.  In case of reset, HCD is responsible for restoring this value.

PLE

0b

R/W

R

PeriodicListEnable

This bit is set to enable the processing of the periodic list in the next Frame. If cleared by HCD, processing of the periodic list does not occur after the next SOF.  HC must check this bit before it starts processing the list.

IE

0b

R/W

R

IsochronousEnable

This bit is used by HCD to enable/disable processing of isochronous EDs.  While processing the periodic list in a Frame, HC checks the status of this bit when it finds an Isochronous ED (F=1).  If set (enabled), HC continues processing the EDs.  If cleared (disabled), HC halts processing of the periodic list (which now contains only isochronous EDs) and begins processing the Bulk/Control lists.  Setting this bit is guaranteed to take effect in the next Frame (not the current Frame).

CLE

0b

R/W

R

ControlListEnable

This bit is set to enable the processing of the Control list in the next Frame. If cleared by HCD, processing of the Control list does not occur after the next SOF.  HC must check this bit whenever it determines to process the list.  When disabled, HCD may modify the list.  If HcControlCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcControlCurrentED before re-enabling processing of the list.

BLE

0b

R/W

R

BulkListEnable

This bit is set to enable the processing of the Bulk list in the next Frame. If cleared by HCD, processing of the Bulk list does not occur after the next SOF.  HC checks this bit whenever it determines to process the list.  When disabled, HCD may modify the list.  If HcBulkCurrentED is pointing to an ED to be removed, HCD must advance the pointer by updating HcBulkCurrentED before re-enabling processing of the list.

HCFS

00b

R/W

R/W

HostControllerFunctionalState for USB

       00b: UsbReset
       01b: UsbResume
       10b: UsbOperational
       11b: UsbSuspend

A transition to UsbOperational from another state causes SOF generation to begin 1 ms later.  HCD may determine whether HC has begun sending SOFs by reading the StartofFrame field of HcInterruptStatus.

This field may be changed by HC only when in the UsbSuspend state.  HC may move from the UsbSuspend state to the UsbResume state after detecting the resume signaling from a downstream port.

HC enters UsbSuspend after a software reset, whereas it enters UsbReset after a hardware reset.  The latter also resets the Root Hub and asserts subsequent reset signaling to downstream ports.

IR

0b

R/W

R

InterruptRouting

This bit determines the routing of interrupts generated by events registered in HcInterruptStatus.  If clear, all interrupts are routed to the normal host bus interrupt mechanism.  If set, interrupts are routed to the System Management Interrupt.  HCD clears this bit upon a hardware reset, but it does not alter this bit upon a software reset.  HCD uses this bit as a tag to indicate the ownership of HC.

RWC

0b

R/W

R/W

RemoteWakeupConnected

This bit indicates whether HC supports remote wakeup signaling.  If remote wakeup is supported and used by the system it is the responsibility of system firmware to set this bit during POST.  HC  clears the bit upon a hardware reset but does not alter it upon a software reset.  Remote wakeup signaling of the host system is host-bus-specific and is not described in this specification.

RWE

0b

R/W

R

RemoteWakeupEnable

This bit is used by HCD to enable or disable the remote wakeup feature upon the detection of upstream resume signaling.  When this bit is set and the ResumeDetected bit in HcInterruptStatus is set, a remote wakeup is signaled to the host system.  Setting this bit has no impact on the generation of hardware interrupt.