原创 DSP 28335 开发之 CAN

（1）初始化“init_eCAN_A ”

/* Function: init_eCAN_A----------------------------
 *
 * Abstract:
 *      Configure eCAN_A module
 */
void init_eCAN_A ( uint16_T bitRatePrescaler, uint16_T timeSeg1, uint16_T
                  timeSeg2, uint16_T sbg, uint16_T sjw, uint16_T sam)
{
  struct ECAN_REGS ECanaShadow;

  /* Configure CAN pins using GPIO regs */
  EALLOW;
  GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;  // Enable pull-up for GPIO18 (CANRXA)
  GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 3; // Configure GPIO18 for CANRXA operation
  GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;  // Enable pull-up for GPIO19 (CANTXA)
  GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 3; // Configure GPIO19 for CANTXA operation
  EDIS;

  /* Configure the RX and TX pins for transmission */
  EALLOW;
  ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
  ECanaShadow.CANRIOC.bit.RXFUNC = 1;
  ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;
  ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
  ECanaShadow.CANTIOC.bit.TXFUNC = 1;
  ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;
  EDIS;

  /* Disable all Mailboxes */
  ECanaRegs.CANME.all = 0;
  EALLOW;
  ECanaRegs.CANMIM.all = 0xFFFFFFFF;
  ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
  ECanaShadow.CANMC.bit.CCR = 1;
  ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
  EDIS;

  do {
    ECanaShadow.CANES.all = ECanaRegs.CANES.all;
  } while (ECanaShadow.CANES.bit.CCE != 1 );// Wait for CCE bit to be set..

  /* Configure the eCAN timing parameters */
  EALLOW;
  ECanaShadow.CANBTC.all = ECanaRegs.CANBTC.all;
  ECanaShadow.CANBTC.bit.BRPREG = bitRatePrescaler-1;
  ECanaShadow.CANBTC.bit.TSEG2REG = timeSeg2-1;
  ECanaShadow.CANBTC.bit.TSEG1REG = timeSeg1-1;
  ECanaShadow.CANBTC.bit.SAM = sam-1;
  ECanaShadow.CANBTC.bit.SJWREG = sjw-1;

  //ECanaShadow.CANBTC.bit.ERM = sbg-1;
  ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;
  ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
  ECanaShadow.CANMC.bit.CCR = 0 ;      // Set CCR = 0
  ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
  EDIS;

  do {
    ECanaShadow.CANES.all = ECanaRegs.CANES.all;
  } while (ECanaShadow.CANES.bit.CCE != 0 );// Wait for CCE bit to be cleared..

  EALLOW;
  ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
  ECanaShadow.CANMC.bit.STM = 0;       // Configure CAN for normal mode
  ECanaShadow.CANMC.bit.SCB = 1;       // User has selected eCAN mode
  ECanaShadow.CANMC.bit.DBO = 1;       // Set byte order: least significant first
  ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
  EDIS;

  /* Configure CAN interrupts */
  EALLOW;
  ECanaShadow.CANMIM.all = ECanaRegs.CANMIM.all;
  ECanaShadow.CANMIM.all = (uint32_T) 0;
  ECanaRegs.CANMIM = ECanaShadow.CANMIM;
  EDIS;
  EALLOW;
  ECanaShadow.CANMIL.all = ECanaRegs.CANMIL.all;
  ECanaShadow.CANMIL.all = (uint32_T) 0;
  ECanaRegs.CANMIL = ECanaShadow.CANMIL;
  EDIS;
  EALLOW;
  ECanaShadow.CANGIM.all = ECanaRegs.CANGIM.all;
  ECanaShadow.CANGIM.bit.GIL = 0;      // GIL value determines ECana(0/1)INT
  ECanaShadow.CANGIM.bit.I0EN = 0;
  ECanaShadow.CANGIM.bit.I1EN = 0;
  ECanaRegs.CANGIM.all = ECanaShadow.CANGIM.all;
  EDIS;
}
（2）配置“config_eCAN_A_mbx”

/* Function: config_eCAN_A_mbx--------------------------------
 *
 * Abstract:
 *      Configure eCAN_A mailbox using following parameters:
 *            mbxNo   = 0 through 15 ( or 31)
 *            mbxType = receive (0) OR transmit (1)
 *            msgType = standard (0) OR extended (1)
 */
void config_eCAN_A_mbx (uint16_T mbxType, uint16_T mbxNo, uint32_T msgID,
  uint16_T msgType)
{
  uint32_T maskRx = 0x1;
  uint32_T maskTx;
  struct ECAN_REGS ECanaShadow;
  volatile struct MBOX *mbx = &ECanaMboxes.MBOX0 + mbxNo;
  maskRx = maskRx<<mbxNo;
  maskTx = ~maskRx;
  mbx->MSGCTRL.bit.RTR = 0;
  ECanaShadow.CANME.all = ECanaRegs.CANME.all;
  ECanaRegs.CANME.all = 0x00000000;

  if (msgType==1)
    mbx->MSGID.all = msgID;            /* For Extended ID use bits  0:28 */
  else
    mbx->MSGID.bit.STDMSGID = msgID;   /* For Standard ID use bits 18:28 */
  mbx->MSGID.bit.AME = 0;
  mbx->MSGID.bit.AAM = 0;
  mbx->MSGID.bit.IDE = msgType;
  ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
  if (mbxType==0) {
    ECanaShadow.CANMD.all |= maskRx;
  } else {
    ECanaShadow.CANMD.all &= maskTx;
  }

  ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;
  ECanaShadow.CANME.all |= maskRx;
  ECanaRegs.CANME.all = ECanaShadow.CANME.all;
}

（3）初始化“init_eCAN_B”

/* Function: init_eCAN_B----------------------------
 *
 * Abstract:
 *      Configure eCAN_B module
 */
void init_eCAN_B ( uint16_T bitRatePrescaler, uint16_T timeSeg1, uint16_T
                  timeSeg2, uint16_T sbg, uint16_T sjw, uint16_T sam)
{
  struct ECAN_REGS ECanbShadow;

  /* Configure CAN pins using GPIO regs */
  EALLOW;
  GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0;  // Enable pull-up for GPIO21 (CANRXB)
  GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 3; // Configure GPIO21 for CANRXB operation
  GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0;  // Enable pull-up for GPIO20  (CANTXB)
  GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 3; // Configure GPIO20 for CANTXB operation
  EDIS;

  /* Configure the RX and TX pins for transmission */
  EALLOW;
  ECanbShadow.CANRIOC.all = ECanbRegs.CANRIOC.all;
  ECanbShadow.CANRIOC.bit.RXFUNC = 1;
  ECanbRegs.CANRIOC.all = ECanbShadow.CANRIOC.all;
  ECanbShadow.CANTIOC.all = ECanbRegs.CANTIOC.all;
  ECanbShadow.CANTIOC.bit.TXFUNC = 1;
  ECanbRegs.CANTIOC.all = ECanbShadow.CANTIOC.all;
  EDIS;

  /* Disable all Mailboxes */
  ECanbRegs.CANME.all = 0;
  EALLOW;
  ECanbRegs.CANMIM.all = 0xFFFFFFFF;
  ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
  ECanbShadow.CANMC.bit.CCR = 1;
  ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
  EDIS;

  do {
    ECanbShadow.CANES.all = ECanbRegs.CANES.all;
  } while (ECanbShadow.CANES.bit.CCE != 1 );// Wait for CCE bit to be set..

  /* Configure the eCAN timing parameters */
  EALLOW;
  ECanbShadow.CANBTC.all = ECanbRegs.CANBTC.all;
  ECanbShadow.CANBTC.bit.BRPREG = bitRatePrescaler-1;
  ECanbShadow.CANBTC.bit.TSEG2REG = timeSeg2-1;
  ECanbShadow.CANBTC.bit.TSEG1REG = timeSeg1-1;
  ECanbShadow.CANBTC.bit.SAM = sam-1;
  ECanbShadow.CANBTC.bit.SJWREG = sjw-1;

  //ECanbShadow.CANBTC.bit.ERM = sbg-1;
  ECanbRegs.CANBTC.all = ECanbShadow.CANBTC.all;
  ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
  ECanbShadow.CANMC.bit.CCR = 0 ;      // Set CCR = 0
  ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
  EDIS;
  do {
    ECanbShadow.CANES.all = ECanbRegs.CANES.all;
  } while (ECanbShadow.CANES.bit.CCE != 0 );// Wait for CCE bit to be cleared..

  EALLOW;
  ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
  ECanbShadow.CANMC.bit.STM = 0;       // Configure CAN for normal mode
  ECanbShadow.CANMC.bit.SCB = 1;       // User has selected eCAN mode
  ECanbShadow.CANMC.bit.DBO = 1;       // Set byte order: least significant first
  ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
  EDIS;

  /* Configure CAN interrupts */
  EALLOW;
  ECanbShadow.CANMIM.all = ECanbRegs.CANMIM.all;
  ECanbShadow.CANMIM.all = (uint32_T) 0;
  ECanbRegs.CANMIM = ECanbShadow.CANMIM;
  EDIS;
  EALLOW;
  ECanbShadow.CANMIL.all = ECanbRegs.CANMIL.all;
  ECanbShadow.CANMIL.all = (uint32_T) 0;
  ECanbRegs.CANMIL = ECanbShadow.CANMIL;

  EDIS;
  EALLOW;
  ECanbShadow.CANGIM.all = ECanbRegs.CANGIM.all;
  ECanbShadow.CANGIM.bit.GIL = 0;      // GIL value determines ECanb(0/1)INT
  ECanbShadow.CANGIM.bit.I0EN = 0;
  ECanbShadow.CANGIM.bit.I1EN = 0;
  ECanbRegs.CANGIM.all = ECanbShadow.CANGIM.all;
  EDIS;
}
（4）配置“config_eCAN_B_mbx”

/* Function: config_eCAN_B_mbx--------------------------------
 *
 * Abstract:
 *      Configure eCAN_B mailbox using following parameters:
 *            mbxNo   = 0 through 15 ( or 31)
 *            mbxType = receive (0) OR transmit (1)
 *            msgType = standard (0) OR extended (1)
 */
void config_eCAN_B_mbx (uint16_T mbxType, uint16_T mbxNo, uint32_T msgID,
  uint16_T msgType)
{
  uint32_T maskRx = 0x1;
  uint32_T maskTx;
  struct ECAN_REGS ECanbShadow;
  volatile struct MBOX *mbx = &ECanbMboxes.MBOX0 + mbxNo;
  maskRx = maskRx<<mbxNo;
  maskTx = ~maskRx;
  mbx->MSGCTRL.bit.RTR = 0;
  ECanbShadow.CANME.all = ECanbRegs.CANME.all;
  ECanbRegs.CANME.all = 0x00000000;

  if (msgType==1)
    mbx->MSGID.all = msgID;            /* For Extended ID use bits  0:28 */
  else
    mbx->MSGID.bit.STDMSGID = msgID;   /* For Standard ID use bits 18:28 */
  mbx->MSGID.bit.AME = 0;
  mbx->MSGID.bit.AAM = 0;
  mbx->MSGID.bit.IDE = msgType;
  ECanbShadow.CANMD.all = ECanbRegs.CANMD.all;
  if (mbxType==0) {
    ECanbShadow.CANMD.all |= maskRx;
  } else {
    ECanbShadow.CANMD.all &= maskTx;
  }

  ECanbRegs.CANMD.all = ECanbShadow.CANMD.all;
  ECanbShadow.CANME.all |= maskRx;
  ECanbRegs.CANME.all = ECanbShadow.CANME.all;
}

（5）初始化

  /* initial eCAN function.... */
  /* Initialize eCAN_A Module with following parameters:
   *    BRP=10, TSEG1=6, TSEG2=3
   *    Resynchronize on: Only_falling_edges
   *    Level of CAN bus: Sample_one_time
   *    Synchronization jump width = 2 */
  init_eCAN_A (10, 6, 3, 1, 2, 1);

  /* Initialize eCAN_B Module with following parameters:
   *    BRP=10, TSEG1=6, TSEG2=3
   *    Resynchronize on: Only_falling_edges
   *    Level of CAN bus: Sample_one_time
   *    Synchronization jump width = 2 */
  init_eCAN_B (10, 6, 3, 1, 2, 1);

/* Model initialize function */
void CAN_NET_initialize(boolean_T firstTime)
{
  (void)firstTime;

  /* Registration code */

  /* initialize error status */
  rtmSetErrorStatus(CAN_NET_M, (NULL));

  /* block I/O */
  (void) memset(((void *) &CAN_NET_B),0,
                sizeof(BlockIO_CAN_NET));

  /* Configure mailbox 1 to transmit messages with the ID: 455 */
  config_eCAN_B_mbx (1U, 1, 455, 0);

  /* Configure mailbox 1 to transmit messages with the ID: 455 */
  config_eCAN_A_mbx (1U, 1, 455, 0);

  /* Configure mailbox 0 to receive messages with the ID: 455 */
  config_eCAN_A_mbx (0U, 0, 455, 0);

  /* Configure mailbox 0 to receive messages with the ID: 455 */
  config_eCAN_B_mbx (0U, 0, 455, 0);
}

（6）测试主函数

void main(void)
{
  volatile boolean_T noErr;
  //char *String = "CAN_A接收数据：\n";
  init_board();
  CAN_NET_initialize(1);

  while(1)
  {
 CAN_A_TX( );
 delay(10);
 CAN_B_TX( );
 delay(10);
 CAN_A_RX( );
 CAN_B_RX( );
 delay(1000);
    //scib_xmit(String, 17);
  }

（7）相关函数

//******************************************************
//
//    CAN A Tx
//
//******************************************************

void CAN_A_TX(void)
{

  {
    ECanaMboxes.MBOX1.MDL.word.LOW_WORD =0x2555;
 ECanaMboxes.MBOX1.MDL.word.HI_WORD =0x2aaa;
    ECanaMboxes.MBOX1.MDH.word.LOW_WORD =0x2bbb;
 ECanaMboxes.MBOX1.MDH.word.HI_WORD =0x2ccc;
 ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;
    ECanaRegs.CANTRS.all = (((uint32_T) 0x00000001) << 1);
  }
}

//******************************************************
//
//    CAN B Tx
//
//******************************************************

void CAN_B_TX(void)
{
  {
    ECanbMboxes.MBOX1.MDL.word.LOW_WORD =0x3555;
 ECanbMboxes.MBOX1.MDL.word.HI_WORD =0x3aaa;
    ECanbMboxes.MBOX1.MDH.word.LOW_WORD =0x3bbb;
 ECanbMboxes.MBOX1.MDH.word.HI_WORD =0x3ccc;
    ECanbMboxes.MBOX1.MSGCTRL.bit.DLC = 8;
    ECanbRegs.CANTRS.all = (((uint32_T) 0x00000001) << 1);
  }
}

//******************************************************
//
//    CAN A Rx
//
//******************************************************

void CAN_A_RX(void)
{
 char txString0[31]="2号板，CAN_A_1接收数据:0x     ;";
 char txString1[31]="2号板，CAN_A_2接收数据:0x     ;";
 char txString2[31]="2号板，CAN_A_3接收数据:0x     ;";
 char txString3[31]="2号板，CAN_A_4接收数据:0x     ;";
 char *String_END = "\n";

  {
    struct ECAN_REGS ECanaShadow;
    if (ECanaRegs.CANRMP.bit.RMP0) {
      // reenable the mailbox to receive the next message
      EALLOW;
      ECanaShadow.CANRMP.all = 0x0;
      ECanaShadow.CANRMP.bit.RMP0 = 1; // request clear RMP for this mailbox only
      ECanaRegs.CANRMP.all = ECanaShadow.CANRMP.all;// 32-bit register access is reliable only
      EDIS;
      CAN_NET_B.CAN_A_RX_o2[0] = ECanaMboxes.MBOX0.MDL.word.LOW_WORD;
      CAN_NET_B.CAN_A_RX_o2[1] = ECanaMboxes.MBOX0.MDL.word.HI_WORD;
      CAN_NET_B.CAN_A_RX_o2[2] = ECanaMboxes.MBOX0.MDH.word.LOW_WORD;
      CAN_NET_B.CAN_A_RX_o2[3] = ECanaMboxes.MBOX0.MDH.word.HI_WORD;
    }
 if (ECanaRegs.CANRMP.bit.RMP0) {
      // reenable the mailbox to receive the next message
      EALLOW;
      ECanaShadow.CANRMP.all = 0x0;
      ECanaShadow.CANRMP.bit.RMP0 = 1; // request clear RMP for this mailbox only
      ECanaRegs.CANRMP.all = ECanaShadow.CANRMP.all;// 32-bit register access is reliable only
      EDIS;
      CAN_NET_B.CAN_A_RX_o2[4] = ECanaMboxes.MBOX0.MDL.word.LOW_WORD;
      CAN_NET_B.CAN_A_RX_o2[5] = ECanaMboxes.MBOX0.MDL.word.HI_WORD;
      CAN_NET_B.CAN_A_RX_o2[6] = ECanaMboxes.MBOX0.MDH.word.LOW_WORD;
      CAN_NET_B.CAN_A_RX_o2[7] = ECanaMboxes.MBOX0.MDH.word.HI_WORD;
    }
 if (CAN_A_TEMP1!=CAN_NET_B.CAN_A_RX_o2[0]){
 string_shift_hex(txString0,CAN_NET_B.CAN_A_RX_o2[0]);
 scib_xmit((char*)txString0, 31);
 scib_xmit(String_END, 1);
 }
 if (CAN_A_TEMP2!=CAN_NET_B.CAN_A_RX_o2[1]){
 string_shift_hex(txString1,CAN_NET_B.CAN_A_RX_o2[1]);
 scib_xmit((char*)txString1, 31);
 scib_xmit(String_END, 1);
 }
 if (CAN_A_TEMP3!=CAN_NET_B.CAN_A_RX_o2[2]){
 string_shift_hex(txString2,CAN_NET_B.CAN_A_RX_o2[2]);
 scib_xmit((char*)txString2, 31);
 scib_xmit(String_END, 1); 
 }
 if (CAN_A_TEMP4!=CAN_NET_B.CAN_A_RX_o2[3]){
 string_shift_hex(txString3,CAN_NET_B.CAN_A_RX_o2[3]);
 scib_xmit((char*)txString3, 31);
 scib_xmit(String_END, 1);
 scib_xmit(String_END, 1);
 }

 CAN_A_TEMP1=CAN_NET_B.CAN_A_RX_o2[0];
 CAN_A_TEMP2=CAN_NET_B.CAN_A_RX_o2[1];
 CAN_A_TEMP3=CAN_NET_B.CAN_A_RX_o2[2];
 CAN_A_TEMP4=CAN_NET_B.CAN_A_RX_o2[3];

  }
}

//******************************************************
//
//    CAN B Rx
//
//******************************************************

void CAN_B_RX(void)
{
 char txString0[31]="2号板，CAN_B_1接收数据:0x     ;";
 char txString1[31]="2号板，CAN_B_2接收数据:0x     ;";
 char txString2[31]="2号板，CAN_B_3接收数据:0x     ;";
 char txString3[31]="2号板，CAN_B_4接收数据:0x     ;";
 char *String_END = "\n";

  // S-Function Block: <Root>/CAN_B_RX (c280xcanrcv)
  {
    struct ECAN_REGS ECanbShadow;
    if (ECanbRegs.CANRMP.bit.RMP0) {
      // reenable the mailbox to receive the next message
      EALLOW;
      ECanbShadow.CANRMP.all = 0x0;
      ECanbShadow.CANRMP.bit.RMP0 = 1; // request clear RMP for this mailbox only
      ECanbRegs.CANRMP.all = ECanbShadow.CANRMP.all;// 32-bit register access is reliable only
      EDIS;
      CAN_NET_B.CAN_B_RX_o2[0] = ECanbMboxes.MBOX0.MDL.word.LOW_WORD;
      CAN_NET_B.CAN_B_RX_o2[1] = ECanbMboxes.MBOX0.MDL.word.HI_WORD;
      CAN_NET_B.CAN_B_RX_o2[2] = ECanbMboxes.MBOX0.MDH.word.LOW_WORD;
      CAN_NET_B.CAN_B_RX_o2[3] = ECanbMboxes.MBOX0.MDH.word.HI_WORD;

      // -- Call CAN RX Fcn-Call_0 --
    }

 if (ECanbRegs.CANRMP.bit.RMP0) {
      // reenable the mailbox to receive the next message
      EALLOW;
      ECanbShadow.CANRMP.all = 0x0;
      ECanbShadow.CANRMP.bit.RMP0 = 1; // request clear RMP for this mailbox only
      ECanbRegs.CANRMP.all = ECanbShadow.CANRMP.all;// 32-bit register access is reliable only
      EDIS;
      CAN_NET_B.CAN_B_RX_o2[4] = ECanbMboxes.MBOX0.MDL.word.LOW_WORD;
      CAN_NET_B.CAN_B_RX_o2[5] = ECanbMboxes.MBOX0.MDL.word.HI_WORD;
      CAN_NET_B.CAN_B_RX_o2[6] = ECanbMboxes.MBOX0.MDH.word.LOW_WORD;
      CAN_NET_B.CAN_B_RX_o2[7] = ECanbMboxes.MBOX0.MDH.word.HI_WORD;

      // -- Call CAN RX Fcn-Call_0 --
    }

 if (CAN_B_TEMP1!=CAN_NET_B.CAN_B_RX_o2[0]){
 string_shift_hex(txString0,CAN_NET_B.CAN_B_RX_o2[0]);
 scib_xmit((char*)txString0, 31);
 scib_xmit(String_END, 1);
 }
 if (CAN_B_TEMP2!=CAN_NET_B.CAN_B_RX_o2[1]){
 string_shift_hex(txString1,CAN_NET_B.CAN_B_RX_o2[1]);
 scib_xmit((char*)txString1, 31);
 scib_xmit(String_END, 1);
 }
 if (CAN_B_TEMP3!=CAN_NET_B.CAN_B_RX_o2[2]){
 string_shift_hex(txString2,CAN_NET_B.CAN_B_RX_o2[2]);
 scib_xmit((char*)txString2, 31);
 scib_xmit(String_END, 1); 
 }
 if (CAN_B_TEMP4!=CAN_NET_B.CAN_B_RX_o2[3]){
 string_shift_hex(txString3,CAN_NET_B.CAN_B_RX_o2[3]);
 scib_xmit((char*)txString3, 31);
 scib_xmit(String_END, 1);
 scib_xmit(String_END, 1);
 }
 CAN_B_TEMP1=CAN_NET_B.CAN_B_RX_o2[0];
 CAN_B_TEMP2=CAN_NET_B.CAN_B_RX_o2[1];
 CAN_B_TEMP3=CAN_NET_B.CAN_B_RX_o2[2];
 CAN_B_TEMP4=CAN_NET_B.CAN_B_RX_o2[3];
  }
}