原创 NiosII第一个教程

2007-4-24 13:18 4762 7 7 分类: FPGA/CPLD

总的体系框图:


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SOPC Build中建立系统硬件平台


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顶层例化系统(采用文本方式)


//Implements a simple NiosII system for the DE2 board.
//Inputs: SW7:0 are parallel  port inputs to the NiosII system
//CLOCK_50 is the system clock
//KEY0 is the active-low system reset
//Outputs: LEDG7:0 are parallel port outputs from the NiosII system
module lights(SW, KEY, CLOCK_50, LEDG);
input [7:0] SW;
input [0:0] KEY;
input CLOCK_50;
output [7:0] LEDG;
//Instantiate the NiosII system module generated by the SOPC Builder:
//nios_system(clk,reset_n,out_port_from_the_LEDs,in_port_to_the_Switches)
nios_systemNiosII(CLOCK_50,KEY[0],LEDG,SW);
endmodule


编译完成后,下载硬件平台


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在NIOSII IDE中编写程序


#include "system.h"
#include "altera_avalon_pio_regs.h"


int main()
{
  unsigned char i;
 
  while(1)
  {
  i = IORD_8DIRECT(SWITHES_BASE,0);
  IOWR_8DIRECT(LEDS_BASE,0,i);
  }
  return 0;
 
}


完成编译,下载运行


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