原创 I2C的应答和非应答，如何理解？

A：应答是I2C非常重要的机制，是不一定要弄清。它在工作中涉及的范围包括总线仲裁（多主）、正常的数据通信。这个问题在常见总线里是比较特别的，应当深入详细地了解。让我们先整理一下这个问题。

1　确认应答和非应答的定义和解释：

应答：是一个低电平信号。
非应答：是一个高电平信号，也许，叫做应答非更合适。
两个信号的明显不同是来源不同。应答信号是当前从器件发出的，而非应答信号是由当前主器件发出，再者方向是相反的。
应答或非答的时钟，都由当前主器件发生。
（这句出自何立民的《I2C总线应用系统设计》…………）原述：“应答信号在第9个时钟上出现，接收器输出低电平为应答信号（A），输出高电平则为非应答信号（/A）”，“由于某种原因，被控器不产生应答时，如被控器正在进行其它处理无法接收总线上的数据时，必须释放总线，将数据线置高电平，然后主控器可通过产生一个停止信号信号来比终止数据传输。”“当主控器接收数据时接收到最后一个数据字节后，必须给被控器发送一个非应答位（/A），使被控器发送器释放数据线，以便主控制（注：应当是主控器，不是主控制）发送停止信号从而终止数据传输。” 

  

 

图1　I2C应答规则.gif

 

图2　I2C应答与非应答.gif

( by iC921@2006.03.18 -原创-)　编辑中，请不要回复

 

 

 

 

 

SPI核心特性SPI Core Specifications simple_spi.pdf

Philips I2C站点www.semiconductors.philips.com/i2c

 

 

I2C规范中关于应答的内容

7.2 Acknowledge

Data transfer with acknowledge is obligatory. The acknowledge-related clock pulse is generated by the master. The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse.

The receiver must pull down the SDA line during the acknowledge clock pulse so that it remains stable LOW during the HIGH period of this clock pulse (see Fig.7). Of course, set-up and hold times (specified in Section 15) must also be taken into account.

Usually, a receiver which has been addressed is obliged to generate an acknowledge after each byte has been received, except when the message starts with a CBUS address (see Section 10.1.3).

When a slave doesn’t acknowledge the slave address (for example, it’s unable to receive or transmit because it’s performing some real-time function), the data line must be left HIGH by the slave. The master can then generate either a STOP condition to abort the transfer, or a repeated START condition to start a new transfer.

If a slave-receiver does acknowledge the slave address but, some time later in the transfer cannot receive any more data bytes, the master must again abort the transfer. This is indicated by the slave generating the not-acknowledge on the first byte to follow. The slave leaves the data line HIGH and the master generates a STOP or a repeated START condition.

If a master-receiver is involved in a transfer, it must signal the end of data to the slave- transmitter by not generatingan acknowledge on the last byte that was clocked out of the slave. The slave-transmitter must release the data line to allow the master to generate a STOP or repeated START condition.