标签: 积分器

module integrator( clk,rst,x_in,y_out     ); input clk,rst; input x_in; output   y_out; reg intreg0; reg    intreg1; reg   intreg2;   reg x_reg;         always @(posedge clk) begin if(!rst) begin    x_reg  = 0; intreg0 = 0; intreg1 = 0; intreg2 = 0; end else begin   x_reg = x_in; intreg0 = intreg0 + x_reg; intreg1 = intreg1 + intreg0; intreg2 = intreg2 + intreg1; end end            assign y_out = intreg2;         endmodule 测试文件 module tb_integrator;   // Inputs reg clk; reg rst; reg x_in;   // Outputs wire y_out;   // Instantiate the Unit Under Test (UUT) integrator uut ( .clk(clk),  .rst(rst),  .x_in(x_in),  .y_out(y_out) );   initial begin // Initialize Inputs clk = 0; rst = 0; x_in = 0;   // Wait 100 ns for global reset to finish #100;         rst =1; // Add stimulus here   end       always #10 clk =~clk; always @(posedge clk) begin if(!rst) x_in = 0; else x_in = x_in +1; end endmodule