tag 标签: vdd

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  • 热度 14
    2014-5-23 19:57
    1992 次阅读|
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    When trying to stretch the amount of energy one can get from a battery powering an MCU it’s important to remember, as I wrote last week, that we’re interested in current, not power , since battery capacity is measured in mAh. The equation for power has a hugely-seductive V squared term, but when we’re (correctly) thinking about current, voltage’s effects are linear. So, does it make sense to exploit current’s linear relationship with voltage? Consider the following graph for one of TI’s nifty MSP430 MCUs:   The curves above show a substantial reduction in current as the Vdd decreases. Even at 1 MHz, where the graph isn’t very dramatic-looking, there’s about a 2X improvement by scaling back the MCU’s supply voltage. So this sure looks like a great place to cut coulombs. It’s tempting to put in a low-dropout regulator to reduce Vdd to 2.0, but I can’t find any linear devices whose idle current during the MCU’s long sleep states won’t deplete the battery. Smarter parts can work, like TI’s $0.80 TPS 62736 buck/boost converter that needs only 400 nA for Iq. It does require an inductor, but those are only about 7 cents in quantity. Touchstone’s TS3310 has even better specs, but that company sold all of its assets to Silicon Labs recently; hopefully the latter company will continue to produce the product. But long-lived systems are almost always asleep. A device that has to run for a decade off a coin cell will be snoozing well over 99% of the time. The graph above is active current; cut that by half, and factor in the 1% or less awake time, and it’s clear that there’s really no benefit to scaling Vdd. What about cutting Vdd during the 99% of the time when the processor is sleeping? Most MCUs offer a number of sleep modes that each have differing energy needs. Some show a very small difference in worst-case consumptions; it’s common to find in a deep sleep only a 20% variation between 3 and 2 volts. 20% may be enough to justify an extra dollar’s worth of buck/boost parts as that could add a couple of years to the operating life of a very-low-power system. But remember that a ten-year life means the system’s average draw from a CR2032 can’t exceed 2.5 uA. The TPS 62736 will eat 400 nA of that budget. One vendor shows curves for “typical” sleep needs, and there’s about a 2X difference between 3 and 2 volts, which sounds promising. But under 3V the curve is labeled “limited accuracy.” I wrote about how little a “typical” spec means last August. Combine the meaninglessness of “typical” numbers with “limited accuracy” and I, for one, have no idea how to interpret the data. One wonders if the datasheet was created by marketing folks rather than engineers. “Take it from us, in some modes, it’s possible, based on a statistically meaningless set of observations, that the part might, if coupled to the wings of angels, work in your application.” Unfortunately, most datasheets don’t spec out the difference in sleep current as a function of voltage, so it’s impossible to know what benefits, if any, accrue from voltage scaling. As always, read the datasheets carefully and do a full analysis of your design goals.
  • 热度 24
    2013-4-25 13:29
    1685 次阅读|
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      电路设计以及PCB制作中,经常碰见电源符号:VCC、 VDD、VEE、VSS,他们具有什么样的关系那?   一、解释   VCC:C=circuit 表示电路的意思, 即接入电路的电压   VDD:D=device 表示器件的意思, 即器件内部的工作电压;   VSS:S=series 表示公共连接的意思,通常指电路公共接地端电压   二、说明   1、对于数字电路来说,VCC是电路的供电电压,VDD是芯片的工作电压(通常VccVdd),VSS是接地点。   2、有些IC既有VDD引脚又有VCC引脚,说明这种器件自身带有电压转换功能。   3、在场效应管(或COMS器件)中,VDD为漏极,VSS为源极,VDD和VSS指的是元件引脚,而不表示供电电压。DSP交流网 DSP学习第一论坛 DSP技术应用与推广平台 DSP开发服务平台   4、一般来说VCC=模拟电源,VDD=数字电源,VSS=数字地,VEE=负电源   另外一种解释:   Vcc和Vdd是器件的电源端。Vcc是双极器件的正,Vdd多半是单级器件的正。下标可以理解为NPN晶体管的集电极C,和PMOS or NMOS场效应管的漏极D。同样你可在电路图中看见Vee和Vss,含义一样。因为主流芯片结构是硅NPN所以Vcc通常是正。如果用PNP结构Vcc就为负了。荐义选用芯片时一定要看清电气参数。.   Vcc 来源于集电极电源电压, Collector Voltage, 一般用于双极型晶体管, PNP 管时为负电源电压, 有时也标成 -Vcc, NPN 管时为正电压.DSP交流网 DSP学习第一论坛 DSP技术应用与推广平台 DSP开发服务平台   Vdd 来源于漏极电源电压, Drain Voltage, 用于 MOS 晶体管电路, 一般指正电源. 因为很少单独用 PMOS 晶体管, 所以在 CMOS 电路中 Vdd 经常接在 PMOS 管的源极上   Vss 源极电源电压, 在 CMOS 电路中指负电源, 在单电源时指零伏或接地.   Vee 发射极电源电压, Emitter Voltage, 一般用于 ECL 电路的负电源电压.   Vbb 基极电源电压, 用于双极晶体管的共基电路.DSP交流网 DSP学习第一论坛 DSP技术应用与推广平台 DSP开发服务平台   电路中的解释:DSP交流网 DSP学习第一论坛 DSP技术应用与推广平台 DSP开发服务平台   单解:   VDD:电源电压(单极器件);电源电压(4000系列数字电 路);漏极电压(场效应管)   VCC:电源电压(双极器件);电源电压(74系列数字电路);声控载波(Voice Controlled Carrier)   VSS::地或电源负极   VEE:负电压供电;场效应管的源极(S)   VPP:编程/擦除电压。   详解:   在电子电路中,VCC是电路的供电电压, VDD是芯片的工作电压:   VCC:C=circuit 表示电路的意思, 即接入电路的电压, D=device 表示器件的意思, 即器件内部的工作电压,在普通的电子电路中,一般VccVdd !   VSS:S=series 表示公共连接的意思,也就是负极。   有些IC 同时有VCC和VDD, 这种器件带有电压转换功能。   在“场效应”即COMS元件中,VDD乃CMOS的漏极引脚,VSS乃CMOS的源极引脚, 这是元件引脚符号,它没有“VCC”的名称,你的问题包含3个符号,VCC / VDD /VSS, 这显然是电路符号。   VCC、VEE、VDD、VSS区别 VCC、VEE、VDD、VSS VDD:电源电压(单极器件);电源电压(4000系列数字电 路);漏极电压(场效应管) VCC:电源电压(双极器件);电源电压(74系列数字电路);声控载波(Voice Controlled Carrier) VSS:地或电源负极 VEE:负电压供电;场效应管的源极(S) VPP:编程/擦除电压。 详解: 在电子电路中,VCC是电路的供电电压, VDD是芯片的工作电压: VCC:C=circuit 表示电路的意思, 即接入电路的电压, D=device 表示器件的意思, 即器件内部的工作电压,在普通的电子 电路中,一般VccVdd ! VSS:S=series 表示公共连接的意思,也就是负极。 有些IC 同时有VCC和VDD, 这种器件带有电压转换功能 Vcc和Vee出现在双极型晶体管电路中,和集电极(collector)发射极(emitter)有关,所以 一正一负。 Vdd,Vss在MOS电路中出现,和漏级(Drain),源极(Source)有关,也是一正一负。 Vcc和Vdd是器件的电源端。Vcc是双极器件的正,Vdd多半是单级器件的正。下标可以理解为NPN晶体管的集电极C,和PMOS or NMOS场效应管的漏极D。同样你可在电路图中看见Vee和Vss,含义一样。因为主流芯片结构是硅NPN所以Vcc通常是正。如果用PNP结构Vcc就为负了。建议选用芯片时一定要看清电气参数。 http://www.elecfans.com/dianzichangshi/20110905213926.html
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    如何使用STM32的PVD对电源的电压进行监控STM32中文应用文档如何使用STM32的PVD对电源的电压进行监控用户在使用STM32时,可以利用其内部的PVD对VDD的电压进行监控,通过电源控制寄存器(PWR_CR)中的PLS[2:0]位来设定监控的电压值。PLS[2:0]位用于选择PVD监控电源的电压阀值:000:2.2V001:2.3V010:2.4V011:2.5V100:2.6V101:2.7V110:2.8V111:2.9V在电源控制/状态寄存器(PWR_CSR)中的PVDO标志用来表明VDD是高于还是低于PVD设定的电压阀值。该事件连接到外部中断的第16线,如果该中断在外部中断寄存器中被使能的,该事件就会产生中断。当VDD下降到PVD阀值以下和(或)当VDD上升到PVD阀值之上时,根据外部中断第16线的上升/下降边沿触发设置,就会产生PVD中断。这一特性可用于发现电压出现异常时,执行紧急关闭任务。下面是用于测试PVD的代码:主程序的代码:/*Includes------------------------------------------------------------------*/#include"stm32f10x_lib.h"/*Privat……