ic解密方法-如何使用-有什么中文资料面包板社区

芯谷芯片解密事业部在5年的发展历程中，专注芯片解密行业技术研究，为广大客户提供芯片解密，IC解密，单片机解密等服务，力争成为芯片解密行业领航者为了在更大程度上满足客户的PCB抄板和芯片解密需求，芯谷建立了PCB抄板实验室、芯片解密实验室、民用设备（仿制）实验室、工用设备（仿制）实验室等四大专业实验室以及一家大型生产加工厂，实现了从技术研发、产品生产、产品销售合一的一体化经营模式，芯谷厚积近30年的力量将一路喷涌而发。以下是关于SST89V516RD芯片的基本特性，仅供各位参考： FEATURES: ? 8-bit 8051-Compatible Microcontroller (MCU) with Embedded SuperFlash Memory – Fully Software Compatible – Development Toolset Compatible – Pin-For-Pin Package Compatible SST89E516RD2 Operation – 0 to 40 MHz at 5V SST89V516RD2 Operation – 0 to 33 MHz at 3V 1 KByte Internal RAM Dual Block SuperFlash EEPROM – 64 KByte primary block + 8 KByte secondary block (128-Byte sector size for both blocks) – Individual Block Security Lock with SoftLock – Concurrent Operation during In-Application Programming (IAP) – Memory Overlay for Interrupt Support during IAP Support External Address Range up to 64 KByte of Program and Data Memory Three High-Current Drive Ports (16 mA each) Three 16-bit Timers/Counters Full-Duplex, Enhanced UART – Framing Error Detection – Automatic Address Recognition Ten Interrupt Sources at 4 Priority Levels – Four External Interrupt Inputs Programmable Watchdog Timer (WDT) Programmable Counter Array (PCA) Four 8-bit I/O Ports (32 I/O Pins) and One 4-bit Port Second DPTR register Low EMI Mode (Inhibit ALE) SPI Serial Interface Standard 12 Clocks per cycle, the device has an option to double the speed to 6 clocks per cycle. TTL- and CMOS-Compatible Logic Levels Brown-out Detection Low Power Modes – Power-down Mode with External Interrupt Wake-up – Idle Mode Temperature Ranges: – Commercial (0°C to +70°C) – Industrial (-40°C to +85°C) Packages Available – 40-contact WQFN (Port 4 feature not available) – 44-lead PLCC – 40-pin PDIP (Port 4 feature not available) – 44-lead TQFP All non-Pb (lead-free) devices are RoHS compliant PRODUCT DESCRIPTION The SST89E516RDx and SST89V516RDx are members of the FlashFlex family of 8-bit microcontroller products designed and manufactured with SST’s patented and pro- prietary SuperFlash CMOS semiconductor process tech- nology. The split-gate cell design and thick-oxide tunneling injector offer significant cost and reliability benefits for SST’s customers. The devices use the 8051 instruction set and are pin-for-pin compatible with standard 8051 microcontrol- ler devices. The devices come with 72 KByte of on-chip flash EEPROM program memory which is partitioned into 2 independent program memory blocks. The primary Block 0 occupies 64 KByte of internal program memory space and the secondary Block 1 occupies 8 KByte of internal pro- gram memory space. The 8-KByte secondary block can be mapped to the lowest location of the 64 KByte address space; it can also be hid- den from the program counter and used as an independent EEPROM-like data memory. In addition to the 72 KByte of EEPROM program memory on-chip and 1024 x8 bits of on-chip RAM, the devices can address up to 64 KByte of external program memory andup to 64 KByte of external RAM. The flash memory blocks can be programmed via a stan- dard 87C5x OTP EPROM programmer fitted with a special adapter and the firmware for SST’s devices. During power- on reset, the devices can be configured as either a slave to an external host for source code storage or a master to an external host for an in-application programming (IAP) oper- ation. The devices are designed to be programmed in-sys- tem and in-application on the printed circuit board for maximum flexibility. The devices are pre-programmed with an example of the bootstrap loader in the memory, demon- strating the initial user program code loading or subsequent user code updating via the IAP operation. The sample bootstrap loader is available for the user’s reference and convenience only; SST does not guarantee its functionality or usefulness. Chip-Erase or Block-Erase operations will erase the pre-programmed sample code. FlashFlex MCU SST89E516RD2 / SST89E516RD SST89V516RD2 / SST89V516RD 文章来自： http://www.szxpjm.com/ic/SST/2010/0506/183.html

标签: ic解密方法