tag 标签: Examples

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  • 所需E币: 1
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    DriverExamplesontheDM642EVM
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    TMS320C64xDSPLibrary(V1.02):ExamplesCodes.rar
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    TMS320C64xImage/VideoProcessingLibrary(IMGLIB):ExamplesCodes
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    时间: 2019-12-25 23:13
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    TMS320F2812的C++examples各个模块的程序,头文件,全都有编程好东西-TMS320F2812Cexamplesofthevariousmodulesprocedures,thefirstdocument,allprogrammingisagoodthing!……
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    本应用笔记包含LPC2138微控制器的功耗数据。室温时使用的代码示例测量也包括在内。AN10421PowermanagementforLPC2138Rev.01―06January2006ApplicationnoteDocumentinformationInfoContentKeywordsCoreandperipheralspowerconsumptionmeasurement,codeexamplesAbstractThisapplicationnotecontainspowerconsumptiondatafortheLPC2138MCUs.Codeexamplesusedwhenmakingtheroomtemperaturemeasurementsarealsoincluded.PhilipsSemiconductorsAN10421PowermanagementforLPC2138RevisionhistoryRevDateDescription012006……
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    Abstract:Thisapplicationnoteanalysestheparametersthataffecttheerrorsinprecisiondigital-to-analogconverter(DAC)applications.Theanalysisfocusesonthefactorsintroducedbyboththedataconverterandthevoltagereference.Itdescribesthecalculationsrequiredtoselectthedataconverterandthereferencetomeetthesystem'stargetspecifications.Thecalculationsareavailableinaspreadsheet.Maxim>Designsupport>Appnotes>A/DandD/AConversion/SamplingCircuits>APP4300Maxim>Designsupport>Appnotes>GeneralEngineeringTopics>APP4300Maxim>Designsupport>Appnotes>MeasurementCircuits>APP4300Keywords:voltagereferences,voltagereference,DACreference,threeterminalreference,referenceaccuracy,DAC,digitaltoanalogconverter,DACdesignexamples,errorbudgetSep25,2008APPLICATIONNOTE4300CalculatingtheErrorBudgetinPrecisionDigital-to-AnalogConverter(DAC)ApplicationsBy:DavidFry,StrategicApplicationsEngineeringManagerAbstract:Thisapplicationnoteanalysestheparametersthataffecttheerr……
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    时间: 2019-12-24 10:27
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    一本很经典的英文fpga开发实例设计FPGAPROTOTYPINGBYVERILOGEXAMPLESXilinxSpartanTM-3VersionPongP.ChuClevelandStateUniversityWILEYAJOHNWILEY&SONS,INC.,PUBLICATIONThisPageIntentionallyLeftBlankFPGAPROTOTYPINGBYVERILOGEXAMPLESThisPageIntentionallyLeftBlankFPGAPROTOTYPINGBYVERILOGEXAMPLESXilinxSpartanTM-3VersionPongP.ChuClevelandStateUniversityWILEYAJOHNWILEY&SONS,INC.,PUBLICATIONCopyrightO2008byJohnWiley&Sons,Inc.Allrightsreserved.PublishedbyJohnWiley&Sons,Inc.,Hoboken,NewJersey.PublishedsimultaneouslyinCanada.Nopartofthispublicationmaybereproduced,storedinaretrievalsystem,ortransmittedinanyformorbyanymeans,electronic,mechanical,photocopying,recording,scanning,……
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    ansoftsiwavever3.1full_book,siwave_examples_book……
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    时间: 2020-1-13 16:09
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    ExamplesofHFSSModelingforHighSpeedICDesignExamplesofHFSSModelingforHighSpeedICDesignWeiminSun,PhDVitesseSemiconductorHFSS2003UserWorkshopFebruary21,2003Page1HFSSModelingforHighSpeedICOutlinesI)InterconnectModelsRLCLumpedFull-wave(S-parameterbased)Full-wave(HspiceG&Felements)II)HFSSModelingExamplesOn-Die40GTransmissionLinesDAStagetoStageInterconnectsAFcMLFPackageABGAPackageHighSpeedChannelOn-WaferProbeCalibrationElementsA10GOpticalandElectricalModulePage2InterconnectModels--RLCLumpedRLCModelSimple,easyandefficientMutualcouplinghandlingcouldbeverytediousaspinnumbergrowsNotaccurateforhighspeedrate(LCcut-off)Can’taccountdispersiveloss(skin-depthlossandlosstangent)S-S+S+GNDSS+S+SSGNDPage3Interconn……
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    RFICDesignExamplesBasicsofGaAs,InP,andSiGeRFICsRFICDesignExamplesStephenI.LongDept.ofElectricalandComputerEngineeringUniversityofCalifornia,SantaBarbara,CA93106BasicsofGaAs,InP,andSiGeRFICsS.Long/UCSBDigital:staticfrequencydividerAnalog:widebandtransimpedanceamplifierEmphasizedesignandanalysistechniquesSimulationcomplementsbutdoesnotreplaceanalyticaltechniquesBasicsofGaAs,InP,andSiGeRFICsS.Long/UCSB1.Digital:StaticFrequencyDivider……
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    examples王金明:《VerilogHDL程序设计教程》【例3.1】4位全加器moduleadder4(cout,sum,ina,inb,cin);output[3:0]sum;outputcout;input[3:0]ina,inb;inputcin;assign{cout,sum}=ina+inb+cin;endmodule【例3.2】4位计数器modulecount4(out,reset,clk);output[3:0]out;inputreset,clk;reg[3:0]out;always@(posedgeclk)beginif(reset)elseendendmoduleout【例3.3】4位全加器的仿真程序`timescale1ns/1ns`include"adder4.v"moduleadder_tp;reg[3:0]a,b;regcin;wire[3:0]sum;wirecout;integeri,j;//调用测试对象//设定cin的取值//测试输出信号定义为wire型//测试模块的名字//测试输入信号定义为reg型adder4adder(sum,cout,a,b,cin);always#5cin=~cin;initialbegina=0;b=0;cin=0;for(i=1;i-1-程序文本initialbeginfor(j=1;jinitialbegin$mo……
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    时间: 2019-8-6 17:03
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    FOSDL_Examples
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