标签: cores

USB2.0接口verilog源代码……

chipscope_pro_sw_cores_7_1i_ug029ChipScopeProSoftwareandCoresUserGuide(ChipScopeProSoftwarev7.1i)UG029(v7.1)February16,2005RRXilinxisdisclosingthisDocumentandIntellectualProperty(hereinafter“theDesign”)toyouforuseinthedevelopmentofdesignstooperateon,orinterfacewithXilinxFPGAs.Exceptasstatedherein,noneoftheDesignmaybecopied,reproduced,distributed,republished,downloaded,displayed,posted,ortransmittedinanyformorbyanymeansincluding,butnotlimitedto,electronic,mechanical,photocopying,recording,orotherwise,withoutthepriorwrittenconsentofXilinx.AnyunauthorizeduseoftheDesignmayviolatecopyrightlaws,trademarklaws,thelawsofprivacyandpublicity,andcommunicationsregulationsandstatutes.Xilinxdoesnotassumeanyliability……