标签: high-speed

TheDS80C390isafast8051-compatiblemicroprocessor.Theredesignedprocessorcoreexecutes8051instructionsupto3timesfasterthantheoriginalforthesamecrystalspeed.TheDS80C390supportsamaximumcrystalspeedof40MHz,resultinginapparentexecutionspeedsof100MHz(approximately2.5X).Anoptionalinternalfrequencymultiplierallowsthemicroprocessortooperateatfullspeedwithareducedcrystalfrequency,reducingEMI.Ahardwaremathacceleratorfurtherincreasesthespeedof32and16bitmultiplyanddivideoperations,aswellashigh-speedshift,normalizationandaccumulatefunctions.……

High-SpeedDifferentialIOInterfaceswithDPAinArriaGXDevices……

   Asuccessfulhigh-speedprintedcircuitboard(PCB)requiresintegrationofthedevice(s),PCB(s),andotherelementsintothedesign.Altera?deviceshavefastI/Opinswithfalltimesaslowas1nsto3ns.……

   Mostmemorydevicesstoreandretrievedatabyaddressingspecificmemorylocations.Forexample,asystemusingRAMorROMsearchessequentiallythroughmemorytolocatedata.However,thistechniquecanslowsystemperformancesincethesearchrequiresmultipleclockcyclestocomplete.……

   RecentexpansioninthetelecommunicationsmarketandgrowthinInternetusehavecreatedademandtomovemoredatafasterthanever.Tomeetthisdemand,systemdesignersarerelyingonsolutionssuchasdifferentialsignalingandinterfacestandardssuchasRapidIO,POS-PHYLevel4,orUTOPIAIV.……

   HighSpeedComparatorsProvideManyUsefulCircuitFunctionsWhenUsedCorrectly……

GroundRulesforHighSpeedCircuits……

高速数字系统设计……

   High-speedserialdatatransmissionhasgainedincreasingpopularityinthedatacommunicationsindustry.Becauseoneserialchannelcansupportthebandwidthofmultipleconventionalsingle-endedI/Ostandards,thenumberofI/Opinsandboardtracesaresubstantiallyreduced.Thistracereductionsimplifiesboarddesignandminimizesparalleldatabusskew.……

High-SpeedDifferentialSignalinginCycloneDevices……

High-SpeedDifferentialInterfacesinCycloneIIDevices……

High-SpeedDifferentialInterfacesinCycloneIIIDevices……

High-SpeedDevelopmentKit,StratixGXEditionUserGuide……

Abstract:Analog-to-digitalconverters(ADCs)representthelinkbetweenanaloganddigitalworldsinreceivers,testequipmentandotherelectronicdevices.AsoutlinedinPart1ofthisarticleseries,anumberofkeydynamicparametersprovideanaccuratecorrelationofthedynamicperformancetobeexpectedfromagivenADC.Part2ofthisarticleseriescoverssomeofthesetupconfigurations,equipmentrecommendationsandmeasurementproceduresfortestingthedynamicspecificationsofhigh-speedADCs.Maxim>DesignSupport>TechnicalDocuments>Tutorials>A/DandD/AConversion/SamplingCircuits>APP729Maxim>DesignSupport>TechnicalDocuments>Tutorials>Basestations/WirelessInfrastructure>APP729Maxim>DesignSupport>TechnicalDocuments>Tutorials>High-SpeedSignalProcessing>APP729Keywords:analogtodigitalconverters,ADCs,high-speedADC,SNR,SINAD,ENOB,THD,SFDR,two-toneIMD,multi-toneIMD,clockjitter,FFT,spectrum,windowfunctions,spectralleakage,frequencybin,bins,coherentsampling,hanning,hamming,flattopJul22,2002TUTORIAL729DynamicTestingofHigh-SpeedADCs,Part2Jul22,2002Abstract:Analog-to-digital……

Abstract:Alsocalledcodedensitytest,thehistogramtestapproachhelpsdeterminenonlinearityparameterssuchasdifferentialandintegralnonlinearities(INLandDNL)indataconverters.ThefollowingapplicationnotelendsinsightintothemathematicalrelationshipbetweenprobabilitydensityfunctionandvariousdataconverterspecificationsrequiredtosuccessfullycompletethehistogramtestMaxim>AppNotes>A/DandD/ACONVERSION/SAMPLINGCIRCUITSHIGH-SPEEDSIGNALPROCESSINGKeywords:codedensitytest,histogramtesting,ADC,high-speeddataconverter,integralnonlinearity,INL,May31,2003differentialnonlienarity,DNL,samplerecord,codecount,binwidth,probabilitydensityfunction,confidencelevel,hardwarehistogramAPPLICATIONNOTE2085HistogramTestingDeterminesDNLandINLErrorsAbstract:Alsocalledcodedensitytest,thehistogramtestapproachhelpsdeterminenonlinearityparameterssuchasdifferentialandintegralnonlinearities(INLandDNL)indataconverters.Thefollowingapplicationnotelendsinsightintothemathematicalrelationshipbetweenprobabilitydensityfunctionandvariousdataconverterspecificationsrequired……

Abstract:Anearlierapplicationnote,"CoherentSamplingvs.WindowSampling,"coveredthebasicsofcoherentsampling.Itshoweddifferencesbetweentestsperformedwithcoherentsamplingandwindowedsamplingconditions.Thefollowingtechnicaldiscussionisafollow-upnote,whichdealswiththeproperselectionoftesttonesandinstrumentstosuccessfullytestandevaluateahigh-speedADC'sACperformance.Maxim>AppNotes>A/DandD/AConversion/SamplingCircuitsBasestations/WirelessInfrastructureHigh-SpeedSignalProcessingKeywords:high-speedADCs,analogtodigitalconverters,coherentsampling,inputtesttone,sinewavetesting,Dec18,2002clockfrequency,samplingfrequency,equipment,lowphasenoise,signalgenerator,logicanalyzer,synthesizer,dataacquisitionsoftware,MATLABAPPLICATIONNOTE1819SelectingtheOptimumTestTonesandTestEquipmentforSuccessfulHigh-SpeedADCSinewaveTestingAbstract:Anearlierapplicationnote,"CoherentSamplingvs.WindowSampling,"coveredthebasicsofcoherentsampling.Itshoweddifferencesbetweentestsperformedwithcoherentsamplingandwindowedsamplingconditions.Thefollowingtechnicaldiscussionisafollow……

Abstract:Oneofthemostusefultechniquesforevaluatingthedynamicperformanceoffastandultra-fastdataconvertersiscoherentsampling.ThistechniqueincreasesthespectralresolutionofaFastFourierTransform(FFT)andeliminatestheneedforwindowsamplingwhencertainconditionsaremet.However,iftheconditionsforcoherentsamplingcannotbemet,windowsamplingcanbeused.Thefollowingapplicationnotecomparescoherentsamplingwithwindowsamplingandprovidesanexplanationofhowtoevaluatehigh-speedanalog-to-digitalconverters(ADCs)usingeithermethod,whiledetailingtheadvantagesanddisadvantagesofeach.Maxim>AppNotes>A/DandD/AConversion/SamplingCircuitsBasestations/WirelessInfrastructureHigh-SpeedSignalProcessingKeywords:coherentsampling,windowsampling,high-speed,dataconverters,analog-to-digital,analogue-to-Mar29,2002digital,AtoD,A/D,converters,ADCsAPPLICATIONNOTE1040CoherentSamplingvs.WindowSamplingAbstract:Oneofthemostusefultechniquesforevaluatingthedynamicperformanceoffastandultra-fastdataconvertersiscoherentsampling.ThistechniqueincreasesthespectralresolutionofaFastFourierTransform(FFT)andeliminatestheneedforwindowsamplingwhencertainconditionsaremet.However,iftheconditionsforcoherentsamplingcannotbemet,windowsamplingcanbeused.Thefollowingapplicationnotecomparescohere……

Abstract:High-speedapplicationsusingultra-fastdataconvertersintheirdesignoftenrequireanextremelycleanclocksignaltomakesureanexternalclocksourcedoesnotcontributeundesirednoisetotheoveraldynamicperformanceofthesystem.Itisthereforecrucialtoselectsuitablesystemcomponents,whichhelpgeneratealowphase-jitterclock.Thefollowingapplicationnoteservesasavaluableguideforselectingtheappropriatecomponentstodesignalow-phasenoisePLL-basedclockgenerator,suitableforultra-fastdataconverters.Maxim>AppNotes>A/DandD/ACONVERSION/SAMPLINGCIRCUITSHIGH-SPEEDSIGNALPROCESSINGKeywords:high-speedADCs,high-speedanalogtodigitalconverter,PLL,VCO,phase-lockedloop,voltage-Nov20,2001controlledoscillator,lowphasenoise,lowphasejitter,clockjitter,crystaloscillator,noise,SNR,spuriouscomponents,analogdigital,dataconvertersAPPLICATIONNOTE800DesignaLow-JitterClockforHigh-SpeedDataConvertersAbstract:High-speedapplicationsusingultra-fastdataconvertersintheirdesignoftenrequireanextremelycleanclocksignaltomakesureanexternalclocksourcedoesnotcontributeundesirednoisetotheoveraldynamicperformanceofthesystem.Itisthereforecrucialtoselectsuitablesystemcomponents,whichhelpgene……

Abstract:Thefollowingarticleprovidesaninsightofhowthe260Msps,14-bitdigital-to-analogconverter(DAC)MAX5195withLVPECLdigitalinputsfitsintoGSM/EDGE-basedtransceiverdesigns.ThearticledetailstheexactSFDR,IMD,SNRandMTPRrequirementsandhowtheMAX5195high-dynamicperformanceDACmeetsthesedemands.ThearticleconcludeswithapracticalexampleoftheDAC's4-toneMTPRperformanceusuallyfoundinGSM/EDGEapplications.Maxim>AppNotes>A/DandD/AConversion/SamplingCircuitsBasestations/WirelessInfrastructureHigh-SpeedSignalProcessingKeywords:high-speedDACs,digital-to-analogconverters,DAC,GSM,EDGE,transmitter,multi-carrier,dynamicperformance,spurious-Feb14,2003freedynamicrange,SFDR,signal-to-noiseratio,SNR,intermodulationdistortion,IMD,multi-tonepowerratio,MTPR,Tx,mask,modAPPLICATIONNOTE1886CriticalDACParametersforMulti-CarrierGSM/EDGETransmittersAbstract:Thefollowingarticleprovidesaninsightofhowthe260Msps,14-bitdigital-to-analogconverter(DAC)MAX5195withLVPECLdigitalinputsfitsintoGSM/EDGE-basedtransceiverdesigns.ThearticledetailstheexactSFDR,IMD,SNRandMTPRrequirementsandhowtheMAX5195high-dynamicperformance……

Abstract:Interleavingmultipleanalog-to-digitalconverters(ADCs)isusuallyperformedwiththeintenttoincreaseaconverterseffectivesamplerate,especiallyiftherearenooronlyfewoff-the-shelfADCsavailablethatfulfillthedesiredsample,linearityandACrequirementsofsuchapplications.However,time-interleavingdataconvertersisnotaneasytask,becauseevenwithperfectlylinearcomponents,gain/offsetmismatchesandtimingerrorscancauseundesiredspursintheoutputspectrum.Thefollowingarticleprovidesvaluableinsightintothetheoreticalapproachoftime-interleavedanalog-to-digitalconvertersandthekindofroadblocks(andhowtocompensateforthem)adesignerusuallyencounterswhenbuildingatime-interleavedsystem.Maxim>DesignSupport>TechnicalDocuments>Tutorials>A/DandD/AConversion/SamplingCircuits>APP989Maxim>DesignSupport>TechnicalDocuments>Tutorials>Basestations/WirelessInfrastructure>APP989Maxim>DesignSupport>TechnicalDocuments>Tutorials>High-SpeedSignalProcessing>APP989Keywords:interleaving,time-interleaving,high-speed,analog-to-digitalconverter,high-speedADC,coarsequantizer,finequantizer,flashconverter,bandwidthlimitation,offseterror,gainerror,mismatches,nonlinearities,clockphasenoise,clockjitterMar01,2001TUTORIAL989MultiplyYourSamplingRatewithTime-InterleavedDataConvertersMar01,200……