标签: ASSP

我经常收到关于各类设备之间的差异的问题，诸如ASIC、ASSP、SoC和FPGA之间的区别问题。例如是SoC是ASIC吗？或ASIC是SoC吗？ASIC和ASSP之间的区别是什么？以及高端FPGA应该归类为SoC吗？ 这里有几个难题，至少技术和术语随着时间而演变。牢记这一点，对于这些术语的起源以及它们现在的意义是什么，我对此做了高度简化的解释。 ASIC——特定应用集成电路 让我们从特定应用集成电路（ASIC）开始。正如其名称所表示的，这是因特定目的而创建的设备。当大多数人听到这个词ASIC时，他们的“下意识”反应是，假设它是数字设备。事实上，不论它是模拟的、数字的，或两者的混合，任何定制的芯片都是一个ASIC。然而，对于这些讨论的目的，我们应该假设这是一个完全或主要部分是数字性质的芯片，任何模拟和混合信号功能是沿着物理接口线（物理层）或锁相回路（PLL）的。 ASIC通常被设计和使用在特定系统中的单个公司。开发ASIC非常昂贵、耗时、资源密集的，但ASIC确实能提供低功耗的高性能。 ASSP——专用标准产品 专用标准产品（ASSP）的设计和实施方式完全和ASIC相同。这并不奇怪，因为它们本质上是相同的东西。唯一的区别是，ASSP是更通用的设备，适用于多个系统设计工作室。例如，独立的USB接口芯片可以归类为ASSP。 SoC——系统级芯片 系统级芯片（SoC）是硅芯片，包含一个或多个处理器核心——微处理器（MPU）和/或微控制器（MCU）和/或数字信号处理器（DSP）——片上存储器、硬件加速器功能、外围功能，以及（潜在的）各种其他“东西”。看它是否属于SOC的办法是，先看一个ASIC是否包含一个或多个处理器内核，那么它就是一个SoC。同样，如果一个ASSP包含一个或多个处理器内核，那么它也是一个SoC。 在此基础上，我们可以把ASIC（和ASSP）当做是扩展集术语，因为它包含SoC，或者我们可以把SoC当做是扩展集术语，因为它包括ASIC（或ASSP）的一切，包含一个或多个处理器核心。是不是觉得很好玩呢？ FPGA——现场可编程门阵列 ASIC、ASSP和SoC具有高性能、低功耗的优势，但它们包含的任何算法——除了那些在软件内部处理器内核执行的——其余都是“冻结的”。所以这个时候我们就需要现场可编程门阵列（FPGA）了。早期的FPGA器件的架构相对简单——只是一系列通过可编程互连的可编程模块。 FPGA最厉害的地方是，我们可以配置它的可编程架构来实现任意我们需要的数字功能组合。另外，我们可以以大规模并行的方式实施算法，这意味着我们可以非常迅速和有效地执行大数据的处理。 【分页导航】 第1页： ASIC、ASSP、SoC和FPGA之间的区别 第2页： SoC级的FPGA SoC级的FPGA 随着时间的推移，FPGA器件的能力（容量和性能）大幅提升。例如，现代的FPGA可能包含几千个加法器、乘法器和数字信号处理（DSP）功能；片上存储器、大量高速串行互连器（SERDES）收发器模块，以及许多其他功能。 问题是，现场可编程门阵列（FPGA）的名字不再足以表达出如今可编程器件的性能和功能。我们需要想出一些新的术语，可以表达出一切目前国家最先进的工具和技术能够做到的事情。 和我们在这里的讨论尤其相关的是，今天的FPGA可以包含一个或多个软/硬核处理器。在此基础上，我们应该把这种类型的FPGA归类为SOC（系统级芯片）吗？我个人不得不说SoC不为我工作，因为我把“SOC”一词定义为创建于使用ASIC技术的自定义设备。 另一种方法是称呼这些器件为可编程片上系统，或PSoC，但赛普拉斯半导体公司已经对PSoC这个名称申请了控制权。赛普拉斯的器件具有一个硬核的微控制器，增添了一些可编程模拟和可编程的数字架构（这个数字架构更倾向于CPLD，而不是FPGA）。 Altera公司通常称呼这些器件的这个版本为SoC FPGA，它们结合了硬MCU内核、可编程的FPGA架构，但他们似乎已经发展到只称呼它们为SoC。同时，Xilinx（赛灵思）称呼这些设备的特点为“所有可编程片上系统”。 就个人而言，我拿不定主意什么名字最好。如果赛普拉斯对这一称谓没有采取的控制权的话，我想我更愿意称它为PSoC。但是因为他们已经对PSoC这个词采取了控制权，所以我们不能。PSoC行不通，我想我会选择SoC FPGA。除非你有更好的提议。 【分页导航】 第1页： ASIC、ASSP、SoC和FPGA之间的区别 第2页： SoC级的FPGA

I often get asked about the differences between various types of devices, such as ASICs, ASSPs, SoCs, and FPGAs. Is an SoC an ASIC, or vice versa, for example? What's the difference between an ASIC and an ASSP? And should a high-end FPGA be classed as a form of SoC?   There are several problems here, not the least that the technologies and terminologies have evolved over time. Keeping this in mind, the following is my highly simplified interpretation of where these terms came from and what they mean today.   ASICs Let's start with an application-specific integrated circuit (ASIC). As the name suggests, this is a device that is created with a specific purpose in mind. When most people hear the term ASIC, their "knee-jerk" reaction is to assume a digital device. In reality, any chip that is custom-made is an ASIC, irrespective of whether it is analog, digital, or a mix of both. For the purposes of these discussions, however, we shall assume a chip that is either wholly or predominantly digital in nature, with any analog and mixed-signal functions being along the lines of physical interfaces (PHYs) or phase-locked loops (PLLs).   ASICs are typically designed and used by a single company in a specific system. They are incredibly expensive, time-consuming, and resource-intensive to develop, but they do offer extremely high performance coupled with low power consumption.   ASSPs Application-specific standard parts (ASSPs) are designed and implemented in exactly the same way as ASICs. This is not surprising, because they are essentially the same thing. The only difference is that an ASSP is a more general-purpose device that is intended for use by multiple system design houses. For example, a standalone USB interface chip would be classed as an ASSP.   SoCs A System-on-Chip (SoC) is a silicon chip that contains one or more processor cores -- microprocessors (MPUs) and/or microcontrollers (MCUs) and/or digital signal processors (DSPs) -- along with on-chip memory, hardware accelerator functions, peripheral functions, and (potentially) all sorts of other "stuff." One way to look at this is that if an ASIC contains one or more processor cores then it's an SoC. Similarly, if an ASSP contains one or more processor cores then it's an SoC.     On this basis, we could view ASIC (and ASSP) as being the superset term because it embraces SoC, or we could regard the SoC as being the superset term because it includes everything in an ASIC (or ASSP) along with one or more processor cores. Are we having fun yet?   FPGAs ASICs, ASSPs, and SoCs offer high-performance and low power consumption, but any algorithms they contain -- apart from those that are executed in software on internal processor cores -- are “frozen in silicon.” And so we come to field-programmable gate arrays (FPGAs). The architecture of early FPGA devices was relatively simple -- just an array of programmable blocks linked by programmable interconnect.   The great thing about an FPGA is that we can configure its programmable fabric to implement any combination of digital functions we desire. Also, we can implement algorithms in a massively parallel fashion, which means we can perform a humongous amount of data processing very quickly and efficiently.   SoC-class FPGAs Over time, the capabilities (capacity and performance) of FPGAs increased dramatically. For example, a modern FPGA might contain thousands of adders, multipliers, and digital signal processing (DSP) functions; megabits of on-chip memory, large numbers of high-speed serial interconnect (SERDES) transceiver blocks, and a host of other functions.   The problem is that the field-programmable gate array (FPGA) moniker no longer reflects the capabilities and functionality of today's programmable devices. We really need to come up with some new terminology that embraces everything today's state-of-the-art tools and technologies are capable of doing.   Of particular relevance to our discussions here is the fact that today's FPGAs can contain one or more soft and/or hard core processors. On this basis, should we class this type of FPGA as being an SoC? Well, personally I have to say that SoC doesn’t work for me, because I equate the term "SoC" with a custom device created using ASIC technology.   Another alternative would be to call these devices Programmable SoCs, or PSoCs, but Cypress Semiconductor has already got the PSoC moniker locked down. The Cypress devices feature a hard microcontroller core augmented with some programmable analog and programmable digital fabric (the digital fabric is more CPLD than FPGA).   Altera used to call its versions of these devices -- the ones that combine hard MCU cores with programmable FPGA fabric -- SoC FPGAs, but they seem to have evolved to just calling them SoCs. Meanwhile, Xilinx calls its flavor of these devices "All Programmable SoCs."   Personally, I'm undecided as to what would be the best name. I think I'd prefer to use PSoC if the folks at Cypress hadn’t already taken control of this appellation, but they have, so we can't. Failing this, I guess I'd opt for SoC FPGA... unless you can suggest something better.

I usually get questions about the differences between various types of devices, such as ASICs, ASSPs, SoCs, and FPGAs. Is an SoC an ASIC, or vice versa, for example? What's the difference between an ASIC and an ASSP? And should a high-end FPGA be classed as a form of SoC?   There are several problems here, not the least that the technologies and terminologies have evolved over time. Keeping this in mind, the following is my highly simplified interpretation of where these terms came from and what they mean today.   ASICs Let's start with an application-specific integrated circuit (ASIC). As the name suggests, this is a device that is created with a specific purpose in mind. When most people hear the term ASIC, their "knee-jerk" reaction is to assume a digital device. In reality, any chip that is custom-made is an ASIC, irrespective of whether it is analog, digital, or a mix of both. For the purposes of these discussions, however, we shall assume a chip that is either wholly or predominantly digital in nature, with any analog and mixed-signal functions being along the lines of physical interfaces (PHYs) or phase-locked loops (PLLs).   ASICs are typically designed and used by a single company in a specific system. They are incredibly expensive, time-consuming, and resource-intensive to develop, but they do offer extremely high performance coupled with low power consumption.   ASSPs Application-specific standard parts (ASSPs) are designed and implemented in exactly the same way as ASICs. This is not surprising, because they are essentially the same thing. The only difference is that an ASSP is a more general-purpose device that is intended for use by multiple system design houses. For example, a standalone USB interface chip would be classed as an ASSP.   SoCs A System-on-Chip (SoC) is a silicon chip that contains one or more processor cores -- microprocessors (MPUs) and/or microcontrollers (MCUs) and/or digital signal processors (DSPs) -- along with on-chip memory, hardware accelerator functions, peripheral functions, and (potentially) all sorts of other "stuff." One way to look at this is that if an ASIC contains one or more processor cores then it's an SoC. Similarly, if an ASSP contains one or more processor cores then it's an SoC.     On this basis, we could view ASIC (and ASSP) as being the superset term because it embraces SoC, or we could regard the SoC as being the superset term because it includes everything in an ASIC (or ASSP) along with one or more processor cores. Are we having fun yet?   FPGAs ASICs, ASSPs, and SoCs offer high-performance and low power consumption, but any algorithms they contain -- apart from those that are executed in software on internal processor cores -- are “frozen in silicon.” And so we come to field-programmable gate arrays (FPGAs). The architecture of early FPGA devices was relatively simple -- just an array of programmable blocks linked by programmable interconnect.   The great thing about an FPGA is that we can configure its programmable fabric to implement any combination of digital functions we desire. Also, we can implement algorithms in a massively parallel fashion, which means we can perform a humongous amount of data processing very quickly and efficiently.   SoC-class FPGAs Over time, the capabilities (capacity and performance) of FPGAs increased dramatically. For example, a modern FPGA might contain thousands of adders, multipliers, and digital signal processing (DSP) functions; megabits of on-chip memory, large numbers of high-speed serial interconnect (SERDES) transceiver blocks, and a host of other functions.   The problem is that the field-programmable gate array (FPGA) moniker no longer reflects the capabilities and functionality of today's programmable devices. We really need to come up with some new terminology that embraces everything today's state-of-the-art tools and technologies are capable of doing.   Of particular relevance to our discussions here is the fact that today's FPGAs can contain one or more soft and/or hard core processors. On this basis, should we class this type of FPGA as being an SoC? Well, personally I have to say that SoC doesn’t work for me, because I equate the term "SoC" with a custom device created using ASIC technology.   Another alternative would be to call these devices Programmable SoCs, or PSoCs, but Cypress Semiconductor has already got the PSoC moniker locked down. The Cypress devices feature a hard microcontroller core augmented with some programmable analog and programmable digital fabric (the digital fabric is more CPLD than FPGA).   Altera used to call its versions of these devices -- the ones that combine hard MCU cores with programmable FPGA fabric -- SoC FPGAs, but they seem to have evolved to just calling them SoCs. Meanwhile, Xilinx calls its flavor of these devices "All Programmable SoCs."   Personally, I'm undecided as to what would be the best name. I think I'd prefer to use PSoC if the folks at Cypress hadn’t already taken control of this appellation, but they have, so we can't. Failing this, I guess I'd opt for SoC FPGA... unless you can suggest something better.

在半导体销售行业中，要求客户做 Forecast 已经是司空见惯的事，多数业务、产品经理大都是像被动应付家庭作业一样焦头烂额疲于应付，很少真正用心去对客户的市场销售进行跟踪调查尽量准确估计 Forecast 数字。同时，客户也都不太情愿被追着做 Forecast 尤其是本土企业，而且还按月做三个月甚至半年的 Rolling Forecast--- 真是 Roll 起来没完没了 …!   其实，做 Forecast 非常非常重要， Forecast 做的准不准关系到上下游产业链的运行质量，是一项非常有效的经营手段或工具，笔者也曾经在面试时出过此类问题。   为什么要做 Forecast 呢？   这是因为半导体这类行业的特点决定的：   首先，半导体生产周期较长，从备晶元到投片到掩模到生产直到封装测试需要四周到六周的时间不等；   其次，除了一些非常通用的器件如二三极管记忆体等之外，大多数半导体芯片都是 ASSP 专用芯片，也就是说它们是在特定行业、特定产品、为特定功能才能产生价值的，换到别处就是废物、就是砂子，下了订单到时不拿货就会使供应商产生库存与坏帐；   第三，电子产品市场的变化往往非常迅速，尤其是消费类产品，甚至有的产品一天一个价，生产制造商当然希望当天接单、当天采购，当天生产、当天出货最好当天收钱，相对市场变化的响应能力越迅速当然越好。   所以，半导体生产周期与市场变化的矛盾对分销商、制造商来说库存的风险与挑战极大，就像击鼓传花一样，市场变脸时传到谁手里货就变成垃圾砸在谁手里，转瞬间的现金就能变库存 …! 为了应对这种周期与变化的矛盾，做 Forecast 这种市场预估的尽量降低这种风险办法就应运而生了。   笔者没有了解到这种方法是谁发明的，但自从进到这个行业时就发现从业者每个月都要做这个功课，而且老板经常宣称说 Forecast 准确与否是企业对市场、下游客户未来需求的把握能力，是 Sales 、 PM 的基本功。笔者也发现， Forecast 做得准的客户大多都是业绩优秀的好客户， 这项指标可以做为筛选客户的一个关键指标之一 。   半导体原厂可根据下游代理商及制造商对市场的大致预估进行准备，先备些晶元，这时晶元是空饼，还没有做成固化的 ASSP 。这时下游取消订单的话这部分晶元可以生产别的芯片，不会变成死库存，造成的损失就是多备的晶元要时间来消化，相当于活库存，损失不大。这就在相当程度上保护了供应链的经营风险，提高了市场的适应度。这样首先保护了供应商。   Forecast 如果做得准会给企业自身带来什么好处？   1、   这次 Forecast 不准下次供应商会对你的 Forecast 打折，狼来了不能随便喊。（笔者在品佳的一同事就曾对一港资的大客户的 Forecast 没有全额向上游传递相同数据，而是打了五折，理由是此客户的采购一贯不认真，嘴比天大，总是做不到数量。等到某天客户真的要这么多货时，发现我们没有足够的货给它，使它暴跳如雷，声称要处罚此同事或换代理商。原厂在了解事件原委之后表示支持此同事的做法）。反之，既往的 Forecast 做得准，供应商会给予充分库存、备货支持，你的 Forecast 几乎等价于不付订金的订单。这就是 Forecast 的价值 !   2、   降低上下游综合流通成本，上下游关系进入良性循环，这是不言而喻的。   3、   可降低资金链风险，减少备用资金或额度。制造商、通路商都是用大笔的资金来支撑物流的流通的，有很多是向银行借贷的，也就是说会产生利息成本的。如果 Forecast 准确，资金流的无效储备产生的管理费用就会减小，要知道代理商、制造商的毛利率就那几个点，些许的利息乘以大金额的基数也是非常可观的。   4、   生产人力资源有效配置。制造商最头疼的问题之一就是生产人力的管理，订单来时焦头烂额，没订单时又不能轻易辞退。如果市场预估准确的话，这部分的管理有效性又能提高很多。   5、   优化库存管理，提高资产优质度。对下游估计不准总会产生库存，而且有些可能会是死库存。即便不是死库存也还有按时间流逝的跌价损失。这部分的费用就大了，严重的会把全年的营利都吃掉，是重中之重。它是企业管理能力与效率的核心指标之一，对企业财报数据影响非常关键。   6、   企业商业风险小，对供应商来讲是优质客户的关键指标之一，对上下游关系来讲就是优质的代名词。   综上所述， Forecast 准确与否是一个企业的管理能力的表现，在我们无法了解一个企业内部管理的细节、不能判断它的管理水平与能力时，这个指标就是最好的参考之一。