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PLLjitterTheDesigner’sGuideCommunitydownloadedfromwww.designers-guide.orgModelingJitterinPLL-basedFrequencySynthesizersKenKundertDesigner’sGuideConsulting,Inc.Version4g,August2006AmethodologyispresentedformodelingthejitterinaPhase-LockedLoop(PLL)thatisbothaccurateandefficient.ThemethodologybeginsbycharacterizingthenoisebehavioroftheblocksthatmakeupthePLLusingtransistor-levelsimulation.Foreachblock,thejitterisextractedandprovidedasaparametertobehavioralmodelsforinclusioninahigh-levelsimulationoftheentirePLL.ThisapproachisefficientenoughtobeappliedtoPLLsactingasfrequencysynthesizerswithlargedivideratios.LastupdatedonAugust30,2006.Youcanfindthemostrecentversionatwww.designersguide……