原创 verilog Revered word :genvar

2010-3-27 22:22 2885 9 9 分类: FPGA/CPLD

genvar





Verilog Reserved Word: genvar


Purpose


The genvar reserved word is used as the index control variable by generate for loops.  The genvar variable is restricted to a positive or 0 value.  Negative values, X, and Z values cannot be assigned to a genvar variable.


Syntax


generate
genvar i;
for (i = 0; i < = 7; i = i + 1)
 begin: i
   adder8 add (sum [(i * 8) + : 8], co [i + 1],
                 a [(i * 8) + : 8], b [(i * 8) + : 8], ci );
 end
endgenerate


Example


generate
genvar i;
assign bin [7] = gray[7]
for (i = 6; i > = 7; i = i - 1)
 begin: gray2bin
   assign bin = bin [i - 1] ^ gray;
 end
endgenerate

PARTNER CONTENT

文章评论0条评论)

登录后参与讨论
EE直播间
更多
我要评论
0
9
关闭 站长推荐上一条 /3 下一条