原创 Cyclone3 配置问题

2009-10-7 14:22 4418 2 2 分类: FPGA/CPLD

1: Cyclone3在配置的时候(BANK1的电压是2.5V/3V/3.3V)需要在AS器件的DATA[0]以及JTAG的TDO,TDI上串接一个25ohm的电阻,目的是为了防止电压过冲超过4.1V


“All I/O inputs must maintain a maximum AC voltage of 4.1-V. When using a JTAG
configuration scheme or a serial configuration device in an AS configuration scheme,you must connect a 25ohm series resistor at the near end of the TDO and TDI pin or the serial configuration device for the DATA[0]pin. When cascading Cyclone III family devices in multi-device configuration, you must connect the repeater buffers between the master and slave devices for DATA and DCLK.


   加上电阻的原因在于,EPCS芯片具有很强的驱动能力,可以驱动多个芯片,在点对点工作的时候,这种很强的驱动能力容易造成很大的反射噪声,形成很大的过冲,有可能会超过芯片的承受能力,所以采取串接电阻的方式可以降低过冲。


   下面是AN523 PAGE5的原文:


“The EPCS device has high current capability which makes it suitable for high loading conditions such as multi-device configuration setup with multiple FPGAs. The high current capability contributes to larger reflection noise in a single point-to-point interface such a single-device AS configuration with Cyclone III family devices. In such case, ensure that the magnitude of overshoot noise seen at Cyclone III family devices input pins stay within the allowable limits. Employ external mitigation techniques such as series termination to control the impedance mismatch and the resulting reflection noise.


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2:Cyclone3在配置的时候涉及到配置电压的匹配的问题。


    BANK1的IO电压为3.3V、3.0V、2.5V的时候可以使用AS模式,但是当IO电压时1.8V.1.5V的时候就不行了。


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3:在使用JTAG线在线烧写FPGA的时候,需要考虑过冲电压的问题。ALTERA推荐的办法是在靠近FPGA管脚的地方加肖特基二极管和到地并电容,这样可以减少过冲。在使用了这种措施之后,DATA[0]上的电阻不用了。6273a1eet753f5b9ddb7e&690

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