Typical high-speed-amplifier configurations include two sets of bypass capacitors (Figure 1). One set of capacitors is large (approximately 1 to 10 μF), and the other pair is smaller by a few orders of magnitude (1 to 100 nF). These capacitors provide a low-impedance path from the power supply to ground at frequencies at which the amplifier's power-supply rejection is low. Properly bypassing a high-speed amplifier usually requires two or more sets of capacitors, because the self-resonance of the larger capacitor set usually occurs before the upper threshold of the amplifier's bandwidth. High-quality chip capacitors are ideal for decoupling, because they have far less inductance than through-hole capacitors.
Resistor RT terminates the input of the amplifier to match the impedance of the source to that of the test equipment you're using for the measurements. In an application circuit that is not using a transmission line, the termination resistor is unnecessary. In the figure, the output of the amplifier is driving a load RL, which represents any possible load the amplifier might have to drive. When the output voltage of the amplifier is positive, the amplifier must source current into RL. Likewise, when the output voltage is negative, the amplifier must sink current. Regardless of whether the amplifier sources or sinks this current through the load, it must somehow make its way back to the power supply. In doing so, the current follows the path of least impedance.
At high frequencies, the lowest impedance path goes through the bypass capacitors. As the amplifier sources and sinks high-frequency current, that current flows through various loops. The ground of the upper bypass capacitor sources the current into the op amp, and sinking current flows from the op amp through the lower bypass capacitor to ground. Each of the high-frequency currents flowing through the bypass capacitors is half-wave-rectified. Realizing how these high-frequency currents flow is the key to effective bypassing.
An example circuit contains a high-speed amplifier driving an equivalent 1-kù load, which an attenuator forms to maintain a 50ù back termination for testing (Figure 2). The input also terminates to 50ù to match the source you use. Different layouts for the schematic create different distortion measurements (Figure 3 and Figure 4). Analyzing the high-frequency current loops on the layouts can help explain these second-order harmonic-distortion differences (Figure 5).
In the degraded situation that Figure 3's layout creates, the supply runs reside on the back of the board; this fact means that vias (through holes from one layer of a pc board to another) exist after the bypass capacitors. These vias add inductance to the high-frequency current loops. When the amplifier is sinking current, this current returns to C2 and C4 through a solid ground plane. However, as the amplifier sources current, the current passes through two sets of inductive vias before returning to C1 and C3.
These inductances can create considerable incremental impedance at high frequencies. As high-frequency currents pass through these impedances, error voltages develop. Because the high-frequency currents are half-wave-rectified, the error voltages are also half-wave-rectified. Half-wave-rectified signals carry a large amount of even-ordered harmonic content, causing distortion of the second-order harmonic, and the third harmonic remains unchanged.
Conversely, with Figure 4's improved layout, the power supplies bypass on the front of the board, so no vias exist after the bypass capacitors. Also, the load grounds close to both of the decoupling networks, so no vias are present in the path of high-frequency current that the amplifier sources and sinks. This improved pc-board layout results in a 3- to 18-dBc improvement in second-order harmonic distortion. This improvement occurs over a range of frequencies.
Differential bypassingBypassing schemes are useful in avoiding grounding issues. You can modify Figure 1 so that one set of bypass capacitors (C1 and C3) connect across the power supplies, and the other set (C2 and C4) remains connected between one supply and ground.
Configurations such as this one make it easier to physically ground the bypass capacitors and the load at the same place on the pc board. Grounding the load and bypass capacitors together minimizes the inductance between these grounds. As a result, you minimize error voltages that high-frequency ground currents can form. Also, the high-frequency currents combine before returning from or going to the load. As a result, they are not half-wave-rectified as is the case with standard bypassing, and, consequently, they contain little even-ordered harmonic content. Therefore, an error voltage that develops in the current path does not increase distortion.
You can achieve significant improvement in distortion by applying this technique to a poor bypassing layout (Figure 6). Remember to keep bypass runs short and to minimize the use of vias. Where you require a via, keep in mind that two vias in parallel have half the inductance of one via. The inductance of a via also decreases as you increase its diameter. This scheme may prove particularly useful at closed-loop gains greater than 1, when you also need to ground the feedback network. In this case, the feedback network is effectively part of the amplifier load. High-frequency current flowing in the feedback network also returns to the supply by way of the bypass capacitors. As a result, you also need to locate the feedback network's ground in a way that minimizes inductance added to the bypass capacitors.
Load-ground-current effectsThe previous example discusses the effect that poor bypass-ground placement has on harmonic distortion. Evaluating the high-frequency current paths suggests that the placement of the load ground will also likely have an impact. For long load-current return paths, the 100ù load comprises a 49.9ù back-termination resistor and a 50ù resistor (Figure 7). The 50ù resistor is the input impedance of the spectrum analyzer you use to make the measurements. The transmission line is approximately 1 in. of 50ù pc-board trace in series with 6 in. of high-quality, 50ù coaxial cable. High-frequency sourced and sunk current must travel in a long, inductive loop comprising the 100ù load, the bypass capacitors, the transmission line, and the output stage of the amplifier.
For short load-current return paths, replace the 49.9ù resistor with a 976ù resistor; connect a 114ù resistor on its left side to ground and a 52.3ù resistor on its right side to ground. This circuit achieves the same 100ù effective load for the amplifier, and a long path still exists to the 50ù termination of the spectrum analyzer. However, most of the load current now has a short return path to the bypass capacitors, thanks to the 114ù resistor. This short return path is much less inductive than the long path in the previous example. Less inductance leads to fewer developing error voltages as high-frequency current flows in these loops. Although this configuration is unusable when driving back-terminated lines, it still optimizes an amplifier's ability to drive heavy loads, such as the low-impedance feedback networks that occur in low-noise configurations.
A comparison of the second-order harmonic distortion for these two load-current return paths reveals that a long return path for load current increases the size of the high-frequency current loops (Figure 8). Because the loops are longer, they are likely to be more inductive. High-frequency, half-wave-rectified currents returning to and from the load by way of the bypass capacitors develop error voltages. The fact that these error voltages are half-wave-rectified affects the second-order harmonic distortion. This example shows the importance of keeping high-frequency current paths as short as possible by not unnecessarily grounding the load far away from the amplifier.
The pinout of the amplifier, which, unfortunately, is difficult for users to change, can also have a substantial effect on distortion. Degradation arises from the fact that, with a standard SO-8 pinout, the negative power supply resides directly next to the noninverting input of the amplifier (Figure 9). When current sinks into the amplifier, it winds up flowing out of the negative supply. This current, dIS–, creates a magnetic field, B, which couples the negative-supply pin to the noninverting input. Coupling these two pins can induce error current, dIIP, in the noninverting input.
Lenz's Law states that the direction of this current is opposite to the field that created it. This error current, in turn, produces an error voltage, which appears during half of each cycle, because –VS provides load current only half the time. This situation creates an asymmetry in the output voltage and results in degraded even-ordered distortion. Some amplifiers feature a rotated pinout that moves the negative-supply pin away from the noninverting input (Figure 10).
Users will most likely see the effect that package pinouts can have on distortion when driving a low-impedance load. This scenario occurs because the amount of current flowing is greater, thereby making dIS– greater (Figure 11). Increasing the closed-loop gain of the system makes the error appear larger at the output, but it may not incrementally degrade distortion, because a decrease in loop gain has already caused degradation.
Author Information |
Greg DiSanto is a product and test engineer at Analog Devices (Wilmington, MA). He characterizes and develops test systems for new products. He received his bachelor's and master's degrees from the University of Massachusetts—Lowell in 2002 and 2003, respectively. |
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