原创 基本触发器设计--Protel99SE自带CUPL语言设计

Name        PLDDesign2           ;
Partno      2                    ;
Revision    1                    ;
Date        3/12/02              ;
Designer    HotPower             ;
Company     Protel International ;
Assembly                         ;
Location                         ;
Device      g16v8                ;
Format      j                    ;

/*********************************************************************/
/* This PLD design (Revision 1) created on 3/12/02                   */
/*      for                   Protel International                   */
/*      and is stored as      PLDDesign                              */
/*********************************************************************/

/** Rs Latch **/
Pin[2, 3, 19,18] = [s, r, qst, qsc];
/** T flip - flop **/
Pin[5, 17,16] = [t, qtt, qtc];
/** D flip - flop **/
Pin[6, 15,14] = [d, qdt, qdc];
/** JK flip - flop **/
Pin[7, 8, 13,12] = [j, k, qjt, qjc];
/** Control **/
Pin[1, 4, 9, 11] = [clk, pr, clr, oe];
/** Power **/
Pin[10, 20] = [GND, VCC];
/** Declarations and Intermediate Variables  **/

/** Logic Equations **/

/** Rs Latch **/
qst = !s
    # r & qst;

qsc = !r
    # s & qsc;

/** T flip - flop **/
qtt.d = pr
      # !clr & !t & qtt
      # !clr &  t & qtc;

qtc.d = clr
      # !pr & !t & qtc
      # !pr &  t & qtt;

/** D flip - flop **/
qdt.d = pr
      # d & !clr;

qdc.d = clr
      # !d & !pr;

/** JK flip - flop **/
qjt.d = pr
      # j & qjc & !clr
      # !k & qjt & !clr;

qjc.d = clr
      # !j & qjc & !pr
      #  k & qjt & !pr;