原创 VGA Pin defintion

2011-7-8 20:43 1959 5 5 分类: 消费电子

1. VGA插座形式


15 pin highdensity D-SUB female connector layout            15 pin highdensity D-SUB male connector layout

         female                               male

 

2. VGA引脚定义


 

Pin Name Dir Description
1 RED -- /> Red Video (75 ohm, 0.7 V p-p)
2 GREEN -- /> Green Video (75 ohm, 0.7 V p-p)
3 BLUE -- /> Blue Video (75 ohm, 0.7 V p-p)
4 ID2 <-- Monitor ID Bit 2
5 GND --- Ground
6 RGND --- Red Ground
7 GGND --- Green Ground
8 BGND --- Blue Ground
9 KEY - Key (No pin)
10 SGND --- Sync Ground
11 ID0 <-- Monitor ID Bit 0
12 ID1 or SDA <-- Monitor ID Bit 1
13 HSYNC or CSYNC -- /> Horizontal Sync (or Composite Sync)
14 VSYNC -- /> Vertical Sync
15 ID3 or SCL <-- Monitor ID Bit 3

 

Note: Direction is Computer relative Monitor. All VGA pinout signals except R, G, B are TTL level signals.

 

3. Monitor Type Detect


 3.1 ID

4    11   12
ID2  ID0  ID1
----------------------------------------------
n/c  n/c  n/c   no monitor
n/c  n/c  GND   Mono monitor which does not support 1024x768
n/c  GND  n/c   Color monitor which does not support 1024x768
GND  GND  n/c   Color monitor which supports 1024x768

GND means connected to ground
n/c means that the pin is not connected anywhere 

This monitor type detection is becoming more and more obsolete nowadays. New VGA plug-and-play monitors communicate with the computer according to VESA DDC standard.

3.2 DDC

VESA Display Data Channel is a method for integrating digital interface to VGA connector so as to enable the monitor and graphics card to communicate. There are two different levels of DDC: DDC1 and DDC2.

VGA DDC1 pinout details

DDC1 allows the monitor to tell its parameters to the computer. The following VGA card connector pins have to be changed to allow DDC1 functions:

VGA pin    new function
 9     Optional +5V output from graphics card
12     Data from display
14     Standard vertical sync signal which works also as data clock
15     Monitor ID3

When the VGA graphics card detects data on data-line it starts to read the data coming from the monitor synchronous to vertical sync pulse. Vertical sync pulse frequency can be increased up to 25 KHz for the time of the data transfer if a DDC1 compliant monitor is found (be sure not to send those high frequencies to non DDC1 monitors!).

VGA DDC2 pinout details

DDC2 allows bidirectional communication: monitor can tell its parameters and the computer can adjust monitor settings. The bidirectional data bus is a synchronous data bus similar to Access Bus and is based on I2C technology. The following pins on VGA pinout have to be changed to enable DDC2 to work:

VGA pin    new function
 9     Optional +5V output from graphics card
12     Bidirectional data line (SDA)
15     Data clock (SCLK)

The signals in the data bus are standard I2C signals. The computer provides 15 kohm pullup for the SDA and SCLK lines. Monitor must provide 47 kohm pull-up on SCLK line.

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