--------------------------- J-Link RDI V4.08k Warning --------------------------- Software interrupt (SWI) 0xFFFFEF occured in ARM mode @ address 0x4000009C.
This SWI is not used for semihosting, but causes the CPU core to be halted. Do you want the core to be automatically restarted when this happens ?
NOTE: Clicking on 'yes' will prevent this message from popping up, but the core will still be halted every time. If your application requires semihosting as well as having its own SWI handler, you should set the semihosting vector to an address in your SWI handler. This address must point to an instruction that is only executed if your SWI handler has identified a call to a semihosting SWI. All registers must already have been restored to whatever values they had on entry to your SWI handler.
For more information on semihosting and SWIs, please refer to the ARM ADS debug target guide. --------------------------- 是(Y) 否(N) 取消 ---------------------------
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