原创 Avalon-MM总线上的vjtag master总线调试工具

似乎你的USB下载电缆上没有连接有效的FPGA器件。你确认FPGA下载没有问题？

按照文件步骤操作，出现这些错误： D:\Virtual JTAG>quartus_stp -t avalon_vjtag_master.tcl Info: ****************************************************************** Info: Running Quartus II SignalTap II Info: Version 8.1 Build 163 10/28/2008 SJ Full Version Info: Copyright (C) 1991-2008 Altera Corporation. All rights reserve Info: Your use of Altera Corporation's design tools, logic functions Info: and other software and tools, and its AMPP partner logic Info: functions, and any output files from any of the foregoing Info: (including device programming or simulation files), and any Info: associated documentation or information are expressly subject Info: to the terms and conditions of the Altera Program License Info: Subscription Agreement, Altera MegaCore Function License Info: Agreement, or other applicable license agreement, including, Info: without limitation, that your use is for the sole purpose of Info: programming logic devices manufactured by Altera and sold by Info: Altera or its authorized distributors. Please refer to the Info: applicable agreement for further details. Info: Processing started: Thu Jun 25 13:01:14 2009 Info: Command: quartus_stp -t avalon_vjtag_master.tcl USB-Blaster [USB-0] Select JTAG chain connected to USB-Blaster [USB-0]. Devices on the JTAG chain: ------------------------------------------------ ERROR: The specified device is not found. while executing "get_device_names -hardware_name $Blaster_name" invoked from within "foreach device_name [get_device_names -hardware_name $Blaster_name] { puts " $device_name" }" (file "avalon_vjtag_master.tcl" line 119) ------------------------------------------------ Error: Evaluation of Tcl script avalon_vjtag_master.tcl unsuccessful Error: Quartus II SignalTap II was unsuccessful. 1 error, 0 warnings Error: Peak virtual memory: 77 megabytes Error: Processing ended: Thu Jun 25 13:01:15 2009 Error: Elapsed time: 00:00:01 Error: Total CPU time (on all processors): 00:00:01 D:\Virtual JTAG> 请问如何修改？ 如有必要，我的邮箱是wxkhappy@163.com

看到了，呵呵

写得不错。曾经用的处理器都是独立于FPGA，Nios II还没去玩过。你的设计用在什么地方？

不错的方案，是位置传感器

有，而且得到了实际的产品应用，有兴趣的话可以联系：

Email：zxq914@sohu.com

有没有这样的实验板的成品啊