原创 STM32串行通信之单缓冲器通信模式

2009-7-28 17:11 5524 10 10 分类: MCU/ 嵌入式




 


 


TDR======>>>TSR  ======>>>Tx


RDR<<<======RSR<<<======Rx


 


USART有10个带标志的中断源:包括发送数据寄存器空发送完成接收数据寄存器满







Status register (USART_SR)


Bit 7 TXE: Transmit data register empty (发送数据寄存器空)
This bit is set by hardware when the content of the TDR register has been transferred into the shift register. An interrupt is generated if the TXEIE bit =1 in the USART_CR1 register. It is cleared by a write to the USART_DR register.
0: Data is not transferred to the shift register
1: Data is transferred to the shift register)
Note: This bit is used during single buffer transmission.




Bit 6 TC: Transmission complete(发送完成)
This bit is set by hardware when transmission of a frame containing Data is complete. An interrupt is generated if TCIE="1" in the USART_CR1 register. It is cleared by a software sequence (an read to the USART_SR register followed by a write to the USART_DR register). The TC bit can also be cleared by writing a '0' to it. This clearing sequence is recommended only for multibuffer communication.
0: Transmission is not complete
1: Transmission is complete


Bit 5 RXNE: Read data register not empty(接收数据寄存器满)
This bit is set by hardware when the content of the RDR shift register has been transferred to the USART_DR register. An interrupt is generated if RXNEIE="1" in the USART_CR1 register. It is cleared by a read to the USART_DR register. The RXNE flag can also be cleared by writing a zero to it. This clearing sequence is recommended only for multibuffer communication.
0: Data is not received
1: Received data is ready to be read.












 


[串行通信实例]


送数据采用查询模式  接收数据采用中断模式


[注] 该实例采用LIB_V3.0.0


==============================================================


/*串口配置*/


void USART_Configuration(void)
{
 USART_InitTypeDef USART_InitStructure;
 
 USART_InitStructure.USART_BaudRate = 9600;
 USART_InitStructure.USART_WordLength = USART_WordLength_8b;
 USART_InitStructure.USART_StopBits = USART_StopBits_1;
 USART_InitStructure.USART_Parity = USART_Parity_No ;
 USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
 USART_InitStructure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx
 USART_Init(USART1, &USART_InitStructure);


 /* 若接收数据寄存器满,则产生中断 */
 USART_ITConfig(USART1, USART_IT_RXNE, ENABLE);
 /* Enable the USART1 */
 USART_Cmd(USART1, ENABLE);
}

/*【语句USART_InitStructure.USART_Mode = USART_Mode_Tx;的注释】:当发送使能位(TE)被设置时,发送移位寄存器TSR中的数据在TX脚上输出,相应的时钟脉冲在SCLK脚上输出。在数据传输期间不能复位TE位,否则将破坏TX脚上的数据。*/






/*发送数据*/


USART_SendData(USART1,  'A'); //把要发送的字符A写进TDR寄存器(此动作清除TXE位)
  /*  等待,直到发送数据寄存器空 */     
  while(USART_GetFlagStatus(USART1, USART_FLAG_TXE) == RESET) {
       ;
  }





/*接收数据*/


void USART1_IRQHandler(void)

 static __IO uint16_t clockRXD[1];


 if  (USART_GetITStatus(USART1, USART_IT_RXNE) != RESET) {      /* 若接收数据寄存器满*/
   clockRXD[0] = USART_ReceiveData(USART1); /*此语句作用:将USART_DR寄存器的内容传到clockRXD[0]里。另外,在单缓冲器模式下软件读USART_DR寄存器则完成对RXNE位清除。[注意]在多缓冲器模式下,必须通过软件清零"传输完成标志"DMA1_FLAG_TCx(即:令DMA_IFCR的位CTCIFx=1),否则将会无法跳出中断服务程序,出现一次中断请求无数次响应的后果。*/


 


/*在中断服务程序中,由于主机响应中断时并不知道是哪个中断源发出中断请求,因此必须在中断服务程序中对中断源进行判别,然后分别进行处理。当然,如果只涉及到一个中断请求,是不用做上述判别的。但是无论什么情况,做上述判别是个好习惯*/



}










 


[RM0008] (2008年12月)476/524说:[单字节通信]


如果USART正在发送数据,对USART_DR寄存器的写操作把数据存进TDR寄存器,并在当前传输结束时把该数据复制进移位寄存器。



如果USART没有在发送数据,处于空闲状态,对USART_DR寄存器的写操作直接把数据放进移位寄存器,数据传输开始,TXE位立即被置起。当一帧发送完成时(停止位发送后),TC位被置起,并且如果USART_CR1寄存器中的TCIE位被置起时,中断产生。



先读一下USART_SR寄存器,再写一下USART_DR寄存器,可以完成对TC位的清零。注意:TC位也可以通过对它软件写'0'来清除。此清零方式只在多缓冲器通信模式下推荐使用。







 


注意:本文中,"传输完成标志"DMA1_FLAG_TCx的TC是transfer complete,USART_SR寄存器的TC位是Transmission complete。







【RM0008】(2008年12月)99/524说:直接存储器存取用来提供在外设和存储器之间或者存储器和存储器之间的高速数据传输。


[注]:所谓的外设和存储器之间的DMA传输针对USART而言指的是数据寄存器与存储器之间的DMA传输。而"数据寄存器与移位寄存器之间的数据传输"以及"移位寄存器内部数据的移进移出"在DMA模式(多缓冲器通信模式)和非DMA模式(单缓冲器通信模式)下都是一样的。


 


 


 


 


 

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