原创 DFT Compiler的学习-----part6 Report和Output File

2009-5-11 09:57 5056 6 7 分类: 工程师职场
1.preview_dft

功能:在做inser_dft之前查测试点的信息,扫描链的信息。根据这些信息来确定所加的dft 规格是否完备。

一般是在规则写完并进行dft_drc之后,用此命令查看信息。最常用的就是默认的不带任何option的preview_dft,下面是一个preview_dft的报告。


****************************************
Preview_dft report
For : 'Insert_dft' command
Design : clk
Version: X-2005.09-SP4
Date : Fri Dec 12 09:55:48 2008
****************************************
Number of chains: 1
Scan methodology: full_scan
Scan style: multiplexed_flip_flop
Clock domain: mix_clocks
Scan enable: scan_en (no hookup pin)
Scan chain '1' (data_in[0] --> data_out[0]) contains 31 cells

************ Test Point Plan Report ************
Total number of test points : 1
Number of Autofix test points: 1
Number of Wrapper test points: 0
Number of test modes : 1
Number of test point enables : 0
Number of data sources : 1
Number of data sinks : 0
**************************************************
Dft signals:
TestData: clk_in (no hookup pin)
TestMode: test_en (no hookup pin)

最常用的还有preview_dft show all和preview_dft -test_points all

2.insert_dft
功能:将非扫描的触发器用扫描的触发器替代,添加额外的逻辑来提高fc(需启动autofix),执行增量编译来修复timing和DRC错误。

3.dft_drc -coverage_estimate
功能:执行DRC检查和测试覆盖率的分析,在insert_dft命令之后执行。下面是一个报告。

In mode: Internal_scan...
Design has scan chains in this mode
Design is scan routed
Post-DFT DRC enabled
Information: Starting test design rule checking. (TEST-222)
Loading test protocol
...basic checks...
...basic sequential cell checks...
...checking vector rules...
...checking clock rules...
...checking scan chain rules...
...checking scan compression rules...
...checking X-state rules...
...checking tristate rules...
...extracting scan details...
-----------------------------------------------------------------
DRC Report
Total violations: 0
-----------------------------------------------------------------
Test Design rule checking did not find violations
-----------------------------------------------------------------
Sequential Cell Report
0 out of 31 sequential cells have violations
-----------------------------------------------------------------
SEQUENTIAL CELLS WITHOUT VIOLATIONS * 31 cells are valid scan cells

Information: Test design rule checking completed. (TEST-123)
Running test coverage estimation...
1394 faults were added to fault list.
ATPG performed for stuck fault model using internal pattern source.
----------------------------------------------------------
#patterns #faults #ATPG faults test process stored detect/active red/au/abort coverage CPU time
--------- ------------- ------------ -------- --------
Begin deterministic ATPG:
#uncollapsed_faults=1099,
abort_limit=10... 0 1098 1 0/0/0 99.35% 0.02 0 1 0 0/0/0 99.42% 0.03
Pattern Summary Report
-----------------------------------------------
#internal patterns 0
-----------------------------------------------
Uncollapsed Stuck Fault Summary Report
-----------------------------------------------
fault class code #faults
------------------------------ ---- ---------
Detected DT 1372 Possibly detected PT 0 Undetectable UD 14 ATPG untestable AU
8 Not detected ND 0
test coverage 99.42%
-----------------------------------------------
Information:
The test coverage above may be inferior than the real test coverage
with customized protocol and test simulation library.

4.report_scan_configuration
功能:报告scan的配置信息

****************************************
Report : Scan configuration
Design : clk
Version: X-2005.09-SP4
Date : Fri Dec 12 12:47:49 2008
****************************************
========================================
TEST MODE: all_dft
VIEW : Specification
========================================
Chain count: 1
Scan Style: Multiplexed flip-flop
Maximum scan chain length: Undefined
Physical Partitioning: Horizontal
Replace: True
Preserve multibit segments: True
Clock mixing: Mix clocks
Internal clocks: none
Add lockup: TrueLockup
type: latchInsert
terminal lockup: False
Create dedicated scan out ports: False
Shared scan in: 0
Bidirectional mode: No bidirectional type
Minimize Hold Time Violations: False
Maximum Addtional Wire Length (%): Undefined
Test Clocks by System Clocks: False
Hierarchical Isolation: False
Multiple Scan Enable: Disable
Pipeline Scan Enable: Disable
Voltage Mixing: False

5.report_dft_signal
功能:报告由set_dft_signal设置的内容项,可以分成-view spec和-view existing_dft分着报

6.report_scan_path
功能:报告由set_scan_path指定的path和insert_dft插入的scan path。
选项:-view当指定spec的时候,报告set_scan_path指定的路径,当指定为existing_dft的时候,报告由insert_dft插入的scan path.
-chain指定报告的具体chain,如要报告所有的chain,使用all。
-cell报告指定chain的cell。

总结:

#write out scan reports

report_scan_configuration > reports/scan_config

report_dft_signal -view existing_dft > reports/dft_signals

report_scan_path -view existing_dft -chain all > reports/scan_chains

report_scan_path -view existing_dft -cell all > reports/scan_cells



#write out netlist and spf file for Tetramax

change_names -rules verilog -hier

set test_stil_netlist_format verilog

write -format ddc -hierarchy -output mapped_scan/RISC_CORE.ddc

write -f verilog -h -o tmax/RISC_CORE_SCAN.v

write_test_protocol -o tmax/RISC_CORE_SCAN.spf
PARTNER CONTENT

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用户90519 2009-7-31 14:57

Good。。
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