**************************************** Preview_dft report For : 'Insert_dft' command Design : clk Version: X-2005.09-SP4 Date : Fri Dec 12 09:55:48 2008 **************************************** Number of chains: 1 Scan methodology: full_scan Scan style: multiplexed_flip_flop Clock domain: mix_clocks Scan enable: scan_en (no hookup pin) Scan chain '1' (data_in[0] --> data_out[0]) contains 31 cells
************ Test Point Plan Report ************ Total number of test points : 1 Number of Autofix test points: 1 Number of Wrapper test points: 0 Number of test modes : 1 Number of test point enables : 0 Number of data sources : 1 Number of data sinks : 0 ************************************************** Dft signals: TestData: clk_in (no hookup pin) TestMode: test_en (no hookup pin)
最常用的还有preview_dft show all和preview_dft -test_points all
In mode: Internal_scan... Design has scan chains in this mode Design is scan routed Post-DFT DRC enabled Information: Starting test design rule checking. (TEST-222) Loading test protocol ...basic checks... ...basic sequential cell checks... ...checking vector rules... ...checking clock rules... ...checking scan chain rules... ...checking scan compression rules... ...checking X-state rules... ...checking tristate rules... ...extracting scan details... ----------------------------------------------------------------- DRC Report Total violations: 0 ----------------------------------------------------------------- Test Design rule checking did not find violations ----------------------------------------------------------------- Sequential Cell Report 0 out of 31 sequential cells have violations ----------------------------------------------------------------- SEQUENTIAL CELLS WITHOUT VIOLATIONS * 31 cells are valid scan cells
Information: Test design rule checking completed. (TEST-123) Running test coverage estimation... 1394 faults were added to fault list. ATPG performed for stuck fault model using internal pattern source. ---------------------------------------------------------- #patterns #faults #ATPG faults test process stored detect/active red/au/abort coverage CPU time --------- ------------- ------------ -------- -------- Begin deterministic ATPG: #uncollapsed_faults=1099, abort_limit=10... 0 1098 1 0/0/0 99.35% 0.02 0 1 0 0/0/0 99.42% 0.03 Pattern Summary Report ----------------------------------------------- #internal patterns 0 ----------------------------------------------- Uncollapsed Stuck Fault Summary Report ----------------------------------------------- fault class code #faults ------------------------------ ---- --------- Detected DT 1372 Possibly detected PT 0 Undetectable UD 14 ATPG untestable AU 8 Not detected ND 0 test coverage 99.42% ----------------------------------------------- Information: The test coverage above may be inferior than the real test coverage with customized protocol and test simulation library.
4.report_scan_configuration 功能:报告scan的配置信息
**************************************** Report : Scan configuration Design : clk Version: X-2005.09-SP4 Date : Fri Dec 12 12:47:49 2008 **************************************** ======================================== TEST MODE: all_dft VIEW : Specification ======================================== Chain count: 1 Scan Style: Multiplexed flip-flop Maximum scan chain length: Undefined Physical Partitioning: Horizontal Replace: True Preserve multibit segments: True Clock mixing: Mix clocks Internal clocks: none Add lockup: TrueLockup type: latchInsert terminal lockup: False Create dedicated scan out ports: False Shared scan in: 0 Bidirectional mode: No bidirectional type Minimize Hold Time Violations: False Maximum Addtional Wire Length (%): Undefined Test Clocks by System Clocks: False Hierarchical Isolation: False Multiple Scan Enable: Disable Pipeline Scan Enable: Disable Voltage Mixing: False
用户90519 2009-7-31 14:57