原创 无聊的调试记录

静下心来，写篇日志算是整理整理思路

手上有好几个文档，但是没有一个是针对我这种裸机调试的，没办法一点一点看，在第一手册里面，4.11 G-SPI 

interface signal description 中对SPI 接口描述如下，

 4.1.2 function description

  the G-spi supports a variety of simple address/data protocols over astandard G-SPI physical bus 

the protocols supported are differentiated by the number of address bits and data ordering

这段比较好理解意思是说，这个G-SPI 在标准G-SPI 协议中支持灵活可变的地址数据格式，协议支持由不同的地址位和数据位组成的数据格式

 Each transaction is initiated  by assertion of active low signal scsn. flowing the assertion of scsn, the sdi input is latched  with every positive edge of sclk ,when data is output ,it's clocked out with the negative edge of sclk the clock input sclk is low at the start and completion of a transaction the interrupt output signal is asserted by the card to interrupt the host

 意思是说每一次传输都是有一个低的scsn 信号开始的，紧跟着scsn信号 sdi 在每个时钟的上升沿锁存数据，当数据要输出时，他们锁存在时钟的下降沿，输入的时钟SCLK 在开始之前和结束后都是低电平，

 the first block of data to be transferred is form the host ro the device this block of data contains an address and read/write control the msb of the address is low for read operations and high for write operations 

第一个从host 传输到device 的数据块，包含一个地址及读写控制数据，地址的最高位是低表示读操作，是高表示写操作

 for write transaction the data phase of a transaction immediately follows the address phase of the transaction there is no need to extend the low rime of the clock between address and data or for the host to clock any dymmy cycles

  对于写操作，数据立即接着地址传输，不需要额外的低电平延时在地址和数据之间