原创 基于NiosII与PC数据通信的源码实现

2010-4-24 07:27 1804 2 2 分类: FPGA/CPLD

利用Altera公司的UART core 即可和PC进行数据通信。关于UART coreAltera 提供的资料是这样描述的:<?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" />


The universal asynchronous receiver/transmitter core with Avalon  interface (UART core) implements a method to communicate serial character streams between an embedded system on an Altera FPGA and an external device. The core implements the RS-232 protocol timing, and provides adjustable baud rate, parity, stop and data bits, and optional RTS/CTS flow control signals. The feature set is configurable, allowing designers to implement just the necessary functionality for a given system.


 


 

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