原创 数字时钟

2011-4-14 13:05 1762 3 3 分类: FPGA/CPLD

/*******************************************************************************
电子时钟
在FPGA内部搭建一个电子时钟电路
用4个按键控制,复位键rest,设置按键key1,数值加key2和数值减key3
key1选择模式
0 : 计数器正常工作,数码管正常显示
1 : 设置时钟,相应的数码管闪烁
2 : 设置分钟,相应的数码管闪烁
3 : 设置秒钟,相应的数码管闪烁
本程序采用数码管显示(共阴),采用一块573和138驱动数码管

***************************************************************************/
module clock(clk,rest,key1,key2,key3,seg,scan,speaker);

 input clk;
 input rest,key1,key2,key3;
output [7:0]seg;
output [2:0]scan;
output speaker;

reg [3:0] hour_h,hour_l,minute_h,minute_l,second_h,second_l; //时分秒高位和地位
reg [7:0] hour,minute,second;                               //时分秒计数器
reg [3:0] data;
reg [2:0] cnt;
reg [1:0] mode;        //工作模式
reg clk1khz,clk1hz,clk5hz;
reg [15:0] cnt1;
reg [8:0] cnt2,cnt3;
reg [7:0] seg;
reg [2:0] scan;
reg [2:0] blink;

/***********************分频为1KHz和1Hz *****************************/
always @ (posedge clk)
begin
  if(cnt1==16'd24_999)
    begin
     cnt1<=0;
     clk1khz<=~clk1khz;      //1KHz
    end
  else
    begin
     cnt1<=cnt1+16'b1;
    end
end

always @ (posedge clk1khz)
begin
  if(cnt2==9'd500)
    begin
      cnt2<=0;
      clk1hz<=~clk1hz;           //1Hz
    end
  else
    begin
      cnt2<=cnt2+9'b1;
    end
end

always @ (posedge clk1khz)
begin
  if(cnt3==9'd100)
    begin
      cnt3<=0;
      clk5hz<=~clk5hz;
    end
  else
    begin
      cnt3<=cnt3+9'b1;
    end
end

always @ (posedge clk1khz)
begin
  cnt<=cnt+3'b1;
end
//****************状态控制,各模式下运行的内容********************

always @ (posedge clk5hz)
begin
  if(!rest)
   begin
     mode<=0;
   end
  else if(!key1)
   begin
     mode<=mode+2'b1;         //按键控制工作模式的切换
   end
end

always @ (posedge clk1hz)
begin
  if(!rest)
    begin
      hour<=0;
      minute<=0;
      second<=0;
    end
  else
    begin
      case(mode)
       0 : begin              //正常计数工作
             if(second==59)
               begin
                 second<=0;
                 if(minute==59)
                   begin
                     minute<=0;
                     if(hour==23)
                       begin
                         hour<=0;
                       end
                      else
                       begin
                         hour<=hour+8'b1;
                       end
                   end
                   else
                     begin
                       minute<=minute+8'b1;
                     end
               end
             else
               begin
                 second<=second+8'b1;
               end
           end
       1 : begin                  //小时设置
             if(!key2)
               begin
                 if(hour==23)
                   begin
                     hour<=0;
                   end
                 else
                   begin
                     hour<=hour+8'b1;
                   end
               end
             if(!key3)
               begin
                 if(hour==0)
                   begin
                     hour<=8'd23;
                   end
                 else
                   begin
                     hour<=hour-8'b1;
                   end
               end
           end
       2 : begin            //分钟设置
             if(!key2)
               begin
                 if(minute==59)
                   begin
                     minute<=0;
                   end
                 else
                   begin
                     minute<=minute+8'b1;
                   end
               end
             if(!key3)
               begin
                 if(minute==0)
                   begin
                     minute<=8'd59;
                   end
                 else
                   begin
                     minute<=minute-8'b1;
                   end
               end
           end
       3 : begin                        //秒设置
             if(!key2)
               begin
                 if(second==59)
                   begin
                     second<=0;
                   end
                 else
                   begin
                     second<=second+8'b1;
                   end
               end
             if(!key3)
               begin
                 if(second==0)
                   begin
                     second<=8'd59;
                   end
                 else
                   begin
                     second<=second-8'b1;
                   end
               end
           end
      endcase
    end
end
//**************当进行时间设置的时候,令数码管闪?**************************?

always @ (*)
begin
 case(mode)
 0 : begin blink<=3'b000; end
 1 : begin blink[2]<=clk1hz; blink[1:0]<=0; end
 2 : begin blink[1]<=clk1hz; blink[2]<=0;blink[0]<=0; end
 3 : begin blink[0]<=clk1hz; blink[2]<=0;blink[1]<=0; end
 default : blink<=3'bx;
 endcase
end

//***************将各个计数器里面的值转换成BCD码*****************************//

always @ (second)
begin
  case(second)
  0 : begin second_h<= 0; second_l<= 0; end
  1 : begin second_h<= 0; second_l<= 1; end
  2 : begin second_h<= 0; second_l<= 2; end
  3 : begin second_h<= 0; second_l<= 3; end
  4 : begin second_h<= 0; second_l<= 4; end
  5 : begin second_h<= 0; second_l<= 5; end
  6 : begin second_h<= 0; second_l<= 6; end
  7 : begin second_h<= 0; second_l<= 7; end
  8 : begin second_h<= 0; second_l<= 8; end
  9 : begin second_h<= 0; second_l<= 9; end
 10 : begin second_h<= 1; second_l<= 0; end
 11 : begin second_h<= 1; second_l<= 1; end
 12 : begin second_h<= 1; second_l<= 2; end
 13 : begin second_h<= 1; second_l<= 3; end
 14 : begin second_h<= 1; second_l<= 4; end
 15 : begin second_h<= 1; second_l<= 5; end
 16 : begin second_h<= 1; second_l<= 6; end
 17 : begin second_h<= 1; second_l<= 7; end
 18 : begin second_h<= 1; second_l<= 8; end
 19 : begin second_h<= 1; second_l<= 9; end
 20 : begin second_h<= 2; second_l<= 0; end
 21 : begin second_h<= 2; second_l<= 1; end
 22 : begin second_h<= 2; second_l<= 2; end
 23 : begin second_h<= 2; second_l<= 3; end
 24 : begin second_h<= 2; second_l<= 4; end
 25 : begin second_h<= 2; second_l<= 5; end
 26 : begin second_h<= 2; second_l<= 6; end
 27 : begin second_h<= 2; second_l<= 7; end
 28 : begin second_h<= 2; second_l<= 8; end
 29 : begin second_h<= 2; second_l<= 9; end
 30 : begin second_h<= 3; second_l<= 0; end
 31 : begin second_h<= 3; second_l<= 1; end
 32 : begin second_h<= 3; second_l<= 2; end
 33 : begin second_h<= 3; second_l<= 3; end
 34 : begin second_h<= 3; second_l<= 4; end
 35 : begin second_h<= 3; second_l<= 5; end
 36 : begin second_h<= 3; second_l<= 6; end
 37 : begin second_h<= 3; second_l<= 7; end
 38 : begin second_h<= 3; second_l<= 8; end
 39 : begin second_h<= 3; second_l<= 9; end
 40 : begin second_h<= 4; second_l<= 0; end
 41 : begin second_h<= 4; second_l<= 1; end
 42 : begin second_h<= 4; second_l<= 2; end
 43 : begin second_h<= 4; second_l<= 3; end
 44 : begin second_h<= 4; second_l<= 4; end
 45 : begin second_h<= 4; second_l<= 5; end
 46 : begin second_h<= 4; second_l<= 6; end
 47 : begin second_h<= 4; second_l<= 7; end
 48 : begin second_h<= 4; second_l<= 8; end
 49 : begin second_h<= 4; second_l<= 9; end
 50 : begin second_h<= 5; second_l<= 0; end
 51 : begin second_h<= 5; second_l<= 1; end
 52 : begin second_h<= 5; second_l<= 2; end
 53 : begin second_h<= 5; second_l<= 3; end
 54 : begin second_h<= 5; second_l<= 4; end
 55 : begin second_h<= 5; second_l<= 5; end
 56 : begin second_h<= 5; second_l<= 6; end
 57 : begin second_h<= 5; second_l<= 7; end
 58 : begin second_h<= 5; second_l<= 8; end
 59 : begin second_h<= 5; second_l<= 9; end 
 default : begin second_h<=4'bx; second_l<=4'bx; end
  endcase
end

always @ (minute)
begin
  case(minute)
  0 : begin minute_h<= 0; minute_l<= 0; end
  1 : begin minute_h<= 0; minute_l<= 1; end
  2 : begin minute_h<= 0; minute_l<= 2; end
  3 : begin minute_h<= 0; minute_l<= 3; end
  4 : begin minute_h<= 0; minute_l<= 4; end
  5 : begin minute_h<= 0; minute_l<= 5; end
  6 : begin minute_h<= 0; minute_l<= 6; end
  7 : begin minute_h<= 0; minute_l<= 7; end
  8 : begin minute_h<= 0; minute_l<= 8; end
  9 : begin minute_h<= 0; minute_l<= 9; end
 10 : begin minute_h<= 1; minute_l<= 0; end
 11 : begin minute_h<= 1; minute_l<= 1; end
 12 : begin minute_h<= 1; minute_l<= 2; end
 13 : begin minute_h<= 1; minute_l<= 3; end
 14 : begin minute_h<= 1; minute_l<= 4; end
 15 : begin minute_h<= 1; minute_l<= 5; end
 16 : begin minute_h<= 1; minute_l<= 6; end
 17 : begin minute_h<= 1; minute_l<= 7; end
 18 : begin minute_h<= 1; minute_l<= 8; end
 19 : begin minute_h<= 1; minute_l<= 9; end
 20 : begin minute_h<= 2; minute_l<= 0; end
 21 : begin minute_h<= 2; minute_l<= 1; end
 22 : begin minute_h<= 2; minute_l<= 2; end
 23 : begin minute_h<= 2; minute_l<= 3; end
 24 : begin minute_h<= 2; minute_l<= 4; end
 25 : begin minute_h<= 2; minute_l<= 5; end
 26 : begin minute_h<= 2; minute_l<= 6; end
 27 : begin minute_h<= 2; minute_l<= 7; end
 28 : begin minute_h<= 2; minute_l<= 8; end
 29 : begin minute_h<= 2; minute_l<= 9; end
 30 : begin minute_h<= 3; minute_l<= 0; end
 31 : begin minute_h<= 3; minute_l<= 1; end
 32 : begin minute_h<= 3; minute_l<= 2; end
 33 : begin minute_h<= 3; minute_l<= 3; end
 34 : begin minute_h<= 3; minute_l<= 4; end
 35 : begin minute_h<= 3; minute_l<= 5; end
 36 : begin minute_h<= 3; minute_l<= 6; end
 37 : begin minute_h<= 3; minute_l<= 7; end
 38 : begin minute_h<= 3; minute_l<= 8; end
 39 : begin minute_h<= 3; minute_l<= 9; end
 40 : begin minute_h<= 4; minute_l<= 0; end
 41 : begin minute_h<= 4; minute_l<= 1; end
 42 : begin minute_h<= 4; minute_l<= 2; end
 43 : begin minute_h<= 4; minute_l<= 3; end
 44 : begin minute_h<= 4; minute_l<= 4; end
 45 : begin minute_h<= 4; minute_l<= 5; end
 46 : begin minute_h<= 4; minute_l<= 6; end
 47 : begin minute_h<= 4; minute_l<= 7; end
 48 : begin minute_h<= 4; minute_l<= 8; end
 49 : begin minute_h<= 4; minute_l<= 9; end
 50 : begin minute_h<= 5; minute_l<= 0; end
 51 : begin minute_h<= 5; minute_l<= 1; end
 52 : begin minute_h<= 5; minute_l<= 2; end
 53 : begin minute_h<= 5; minute_l<= 3; end
 54 : begin minute_h<= 5; minute_l<= 4; end
 55 : begin minute_h<= 5; minute_l<= 5; end
 56 : begin minute_h<= 5; minute_l<= 6; end
 57 : begin minute_h<= 5; minute_l<= 7; end
 58 : begin minute_h<= 5; minute_l<= 8; end
 59 : begin minute_h<= 5; minute_l<= 9; end 
 default : begin minute_h<=4'bx; minute_l<=4'bx; end
  endcase 
end

always @ (hour)
begin
  case(hour)
   0 : begin hour_h<=0; hour_l<=0; end
   1 : begin hour_h<=0; hour_l<=1; end
   2 : begin hour_h<=0; hour_l<=2; end
   3 : begin hour_h<=0; hour_l<=3; end
   4 : begin hour_h<=0; hour_l<=4; end
   5 : begin hour_h<=0; hour_l<=5; end
   6 : begin hour_h<=0; hour_l<=6; end
   7 : begin hour_h<=0; hour_l<=7; end
   8 : begin hour_h<=0; hour_l<=8; end
   9 : begin hour_h<=0; hour_l<=9; end
  10 : begin hour_h<=1; hour_l<=0; end
  11 : begin hour_h<=1; hour_l<=1; end
  12 : begin hour_h<=1; hour_l<=2; end
  13 : begin hour_h<=1; hour_l<=3; end
  14 : begin hour_h<=1; hour_l<=4; end
  15 : begin hour_h<=1; hour_l<=5; end
  16 : begin hour_h<=1; hour_l<=6; end
  17 : begin hour_h<=1; hour_l<=7; end
  18 : begin hour_h<=1; hour_l<=8; end
  19 : begin hour_h<=1; hour_l<=9; end
  20 : begin hour_h<=2; hour_l<=0; end
  21 : begin hour_h<=2; hour_l<=1; end
  22 : begin hour_h<=2; hour_l<=2; end
  23 : begin hour_h<=2; hour_l<=3; end
  default : begin hour_h<=4'bx; hour_l<=4'bx; end
  endcase
end

always @ (posedge clk)
begin
  case(cnt)
   0 : begin data<=hour_h|{4{blink[2]}}; scan<=0; end
   1 : begin data<=hour_l|{4{blink[2]}}; scan<=1; end
   2 : begin data<=4'd10;  scan<=2; end
   3 : begin data<=minute_h|{4{blink[1]}}; scan<=3; end
   4 : begin data<=minute_l|{4{blink[1]}}; scan<=4; end
   5 : begin data<=4'd10;  scan<=5; end
   6 : begin data<=second_h|{4{blink[0]}}; scan<=6; end
   7 : begin data<=second_l|{4{blink[0]}}; scan<=7; end
   default : begin data<=4'bx; scan<=3'bx;  end
  endcase
end

always @ (data)         //数码管译码部分
begin
  case(data)
 4'b0000 :  seg=8'h3f;
 4'b0001 :  seg=8'h06;
 4'b0010 :  seg=8'h5b;
 4'b0011 :  seg=8'h4f;
 4'b0100 :  seg=8'h66;
 4'b0101 :  seg=8'h6d;
 4'b0110 :  seg=8'h7d;
 4'b0111 :  seg=8'h07;
 4'b1000 :  seg=8'h7f;
 4'b1001 :  seg=8'h6f;
 4'b1010 :  seg=8'h40;
 4'b1111 :  seg=8'h00;
 default :  seg=8'bx;
  endcase
end
assign speaker=clk1hz;
endmodule

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