原创 EDA: Between a rock and a soft(ware) place

"Caught between a rock and a hard place." That's the line often used to describe those who face a seemingly irresolvable dilemma. However, the dilemma facing IC designers and the suppliers of their electronic design automation (EDA) hardware tools is probably better described as being caught "between a rock and a soft(ware) place."

IC developers have pushed transistor geometries down to the tens of nanometers to increase the gate functionality of their designs. This has allowed the construction of impressive multicore-based system-on-chip designs that increase functionality beyond what anyone could even imagine just a few years ago. But just as the internal combustion engine requires fuel to power it, complex multiprocessor SoC designs need software to run them—lots of it—and it must be developed in close coordination with the evolving hardware design.

This fact came home—again—to roost, at the Design Automation Conference (DAC) this past week and the Embedded Systems Conference in May. In a video, EDN/ESD editor Ron Wilson captures the essence of the situation facing IC designers.

At both shows numerous panels and classes were devoted to the topic. At ESC, EDA vendor Cadence showed its System Development Suite for hardware/software integration, and at DAC, competitor Mentor Graphcs touted its new Common Embedded Software Development. This is not the first time such efforts have been attempted. But will it take this time? Will a truly useable integrated hardware/software framework emerge?