原创 Is low power driving the shift to integrated HW/SW codesign?

Many factors are driving embedded systems developers to higher level tools to integrate hardware/software design, debug and verification: larger code sizes; more complex processors or SoC architectures; and the need for more reliability and security. However, perhaps the most potent force of all is the compelling need for lower power and more energy-efficient operation without sacrificing performance.

Solving this demanding and difficult equation often forces designers to search outside their particular areas of expertise for answers: software developers are learning much more about the processor architectures and the underlying chip-level logic design; semiconductor process engineers are becoming more aware of what the software/hardware application environment demands; and SoC processor architecture designers are dealing with both.

In their quest for solutions, embedded developers are also moving to high level tool environments that allow teams of engineers to move back and forth between several levels of the design.

What tools and techniques are you and your teammates using to coordinate this delicate dance between hardware and software design? Between high performance and low power? Which ones work and which do not? What tools do you need to satisfy these conflicting requirements? What has been your experience and what do you think other developers need to keep in mind?