原创 新思科技招聘 | 十一月热招职位（内推哦）

open岗位：

1、IP Subsystem Design Engineer (PCIE/USB) 北京/上海/深圳

2、Analog Design Engineer, Staff武汉

3、ASIC Digital Design/Verification Engineer武汉/上海

4、Bus Development Mgr上海

5、Product Solution Sales Manager (Verification Platform) 上海

6、Interface IP Application EnSOC Engineer上海/北京/深圳/武汉/西安

7、SOC Engineer上海/北京/深圳/武汉

感兴趣的铁子欢迎砸简历哈：lisa_sm@foxmail.com

或者私v: shevary (备注：内推+岗位+地点)

福利：近几年IC行业的待遇很nice哦，外企福利自不必说，超长年假（18天起）+ 人性化管理（弹性上班时间、支持在家办公等）+ 下午茶等等等

还有超nice的同事哦，快砸简历吧

----岗位详细说明---

1、IP Subsystem Design Engineer (PCIE/USB) 北京/上海/深圳

Job Description：

We’re looking for an IP Subsystem Design and Application Engineer to join the team. Does this sound like a good role for you? This role involves developing and verifying integrated Interface IP Subsystems. Additionally, you’d:

Create design and verification specifications

Determine architecture design, logic design, test bench design, and test cases

Define module interfaces and formats

Evaluate and exercise various aspects of the development flow which may include such items as RTL development, functional simulation, constraint development, design for test logic, synthesis, timing analysis, power analysis, and verification coverage metrics

Key qualifications:

Bachelor’s and/or master’s degree in electrical and/or Electronic Engineering, Computer Engineering or Computer Science

Minimum 5 years of IP and/or ASIC Design/Verification/Applications experience required

Hands-on experience in RTL coding, verification, synthesis, static timing analysis, equivalence check, etc.

Domain knowledge of interface standards: PCIe, USB, Ethernet or DDR

Good communication skills while interacting with internal teams and customers

Preferred Experience:

Experience in Design Compiler, Fusion Compiler, Spyglass or VC

Experience in UVM methodology

Experience in DesignWare Cores

Experience in TCL, Perl, Python, or other shell scripting

2、Analog Design Engineer, Staff 武汉

Responsibilities：

involve in analog design and mixed signal IP design, especially the design of high-speed SerDes

Work with a cross functional design team of analog and digital designers from a wide variety of backgrounds

Design innovative analog and mixed-signal integrated circuits based on leading edge technology (like 7nm/10nm)

Design, implement, verify and debug mix-signal circuits

Participate in critical peer reviews

Guide, implement and review layout design

 Key Qualifications:

Master’s in EE and related fields

8+ years’ experience in designing at least four of the following key functions: Clock and Data Recovery, PLLs, Transmitters, Receivers, Bandgaps, ADC/DAC, DC-DC/LDO, ESD

Experience with high-speed SerDes design

Experience with TCL, Perl, C, python, MATLAB, or other scripting languages

Wonderful competence in communicating with peers, excellent in problem solving, good team working spirit

Good English communication

3、ASIC Digital Design/Verification Engineer武汉/上海

Job Description：

Independently take the design/verification tasks, such as DUT design and coding, and debugging UVM/VMM/SV testbench, help other junior engineers to grow up.

Need to understand standard specifications/ functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity modules in the Test Environment for the DesignWare product such as USB4/USB3.x/MIPI/PCIe,etc.

Creates deliverables which do not require close review or supervision by a Senior Technical Lead.

May learn to do technical review of TE Code of small complexity.

The candidate should be able to analyze the code and function coverage metrics and improve them with definition of additional test cases in CRV environment, at least for small/ medium complexity features of the protocol/ product specs.

The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide.

Design/Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc.

Knowledge of one or more of protocols: Ethernet/USB/AMBA/ MIPI/PCIe

Hands on experience with creating detailed design of certain simple components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM/ VMM.

Hands on experience with Verilog/Systemverilog/VERA coding and Simulation tools; Knowledge of CDC/C++/ OOPs Concepts

Experience with Perforce or similar revision control environment

Knowledge of Make/Perl/Shell scripts.

4、Bus Development Mgr上海

Preferred Experience

Oversees the development of strategic market/product line business plans and marketing programs to support sales in designated market segments

Identifies volume and strategic customers, and develops partnerships

Analyzes market data to identify trends/opportunities, develops strategic direction from market information, and creates compelling market analysis presentations

May conduct make-versus-buy analysis from a partnership/merger/acquisition perspective

Independently resolves a wide range of issues in creative ways on a regular basis

Customarily exercises independent judgment in selecting methods and techniques to obtain solutions

Performs in project leadership role

Contributes to complex aspects of a project

Determines and develops approach to solutions

Provides regular updates to manager on project status

Represents the organization on business unit and/or company-wide projects

Guides more junior peers with aspects of their job

Frequently networks with senior internal and external personnel in own area of expertise

5、Product Solution Sales Manager (Verification Platform) 上海

Job Description：

Responsible for sales of the entire portfolio of Synopsys emulator and/or verification products. Drives sales to obtain revenue and booking goals. Provides expert technical selling in a team environment throughout all phases of the sales cycle from lead generation and cold calling to closing the sale in order to establish new customers and expand our coverage of existing accounts. Emphasis will be placed on the ability to act as a liaison to and direct support from R&D, Product Marketing, and Application Services to satisfy customer requirements, including BU consulting and any training needed on above mentioned tools. Creates short- and long-term business opportunities by building relationships with key executives at our existing and potential customer sites.

Desired Skills and Experience

5-10 years sales experience in technical solution sales / technical sales / IC sales

Strong problem solving skills: ability to assess a problem and determine an effective course of action

Solid knowledge of EDA markets and SoC verification challenges will be a plus

Solid sales experience of emulation and verification solution for SoC will be a plus

Strong leadership in managing complex project engagements and cross functional co-working model

Excellent written and verbal communication, listening, and presentation skills in both Chinese and English

BSEE/BSCS or other technical degree, MBA/MSEE/MSCS will be a plus

Proactive attitude in business initiatives to drive business growth

Familiar with Multi-National co-working model

6、Interface IP Application EnSOC Engineer上海/北京/深圳/武汉/西安

Job Description

Pre-Sale Position:

Discussing with customer on their application and SoC design, Capturing and understanding their design requirements for Interface IP, Preparing IP technical solution with BU R&D to meet the requirements, Co-working with customer to update SoC micro-architecture based on the IP solution

Studying high speed interface protocol update, joining IP product update training and technical conference, and deepening expertise on Interface IP by systematic learning and hands-on IP practice as configuration, synthesis and verification

Working with sales teams to manage IP activities in the region to achieve a high customer satisfaction and for building strong customer relationships

Providing direct technical support and assistance if needed to enable customer to use DW IP successfully

Managing DW IP technical support requirements and needs for existing or prospective customers. This role requires AE to work and coordinate across business units and with other product line teams to provide high quality support for customers.

Providing technical guidance and support to sales team during calls, meetings, and marketing events.

Post-Sale Position：

Provide post-sales technical expertise during the installation, implementation, and customer usage of Interface IP.

You will collaborate with Design Engineering to resolve customer's complex IP implementation challenges and provide feedback for improving the IP’s usability and acceptance by customers.

You will be authoring application-notes and/or white-papers that promote IP in areas such as: ease of use, physical implementation, signal integrity, and silicon debug.

You may be called upon to author technical papers and present them in peer-reviewed technical publications or conferences.

You will have regular contact with external customers and internal contacts across cross- functional teams.

Occasional travel will be required.

7、SOC Engineer上海/北京/深圳/武汉

Job Description：

This is a high caliber technical role, whose mission is to become a trusted technical resource our customers and partners can rely on, to deliver world beating silicon. The role focuses on solutions for the highest performance Automotive SoCs for Software Defined Vehicles being designed today in the most advanced process nodes. We enable our customers to create differentiated, world class Automotive SoCs, leveraging world class IP by optimizing architecture and design choices through planning, early modeling & performance prediction of critical functions.

SoC Architect role profile:

Build technical trust: You will support sales and Automotive Business Development in customer pre-sales campaigns. You will be involved early on as a “neutral” trusted advisor, who analyses the customer’s requirements, creates credibility, and guides the customer towards and through an architecture definition phase.

Architecture definition phase: You will understand the customer’s system, application software workload and SoC requirements and turn them into a robust, Automotive compliant SoC architecture proposal. You will leverage the broad and deep Synopsys technologies and capabilities in terms of IPs, tools and services wherever it makes sense, while keeping the necessary neutrality.

Technical aspects of architecture definition phase: System requirement specification review, software profiling, performance benchmarks, IP requirements with selection criteria, concept for clocking, power up, reset, boot process, power management, package requirements & options, technical safety concept (Safety mechanisms), Architectural FMEDA / FIT rate estimation with the Synopsys FuSa experts, early system models for performance modeling, die size and PPA estimations, DFT Concept (Zero Defect), technology and foundry options, technical/economical tradeoffs, security architecture, project scoping, risk assessment, project planning

Supervise project execution:  You will support and monitor critical customer projects in design execution by our services organization from architecture to RTL freeze. You will stay in tight connection with the customer and the Synopsys internal, respectively external 3rd party design services teams from a technical execution perspective.

This role is an individual contributor role, which requires the ability to drive and guide teams, both on the customer side, as well as within Synopsys. The individual has solid customer interfacing skills, with empathy and strong communication skills, both verbal and written. He/she keeps composure during crises and can handle risks and uncertainty.