AD7928, 70 dB min SINAD at 50 kHz input frequency
Flexible power/serial clock speed management No pipeline delays
High speed serial interface SPI®/QSPI™/
MICROWIRE™/DSP compatible
Data is loaded from the DIN pin of the AD7908/AD7918/AD7928 on the falling edge of SCLK. The data is transferred on the DIN line at the same time that the conversion result is read from the part.就是说我们配置控制寄存器的时候,同时可以读取ADC转换结果。
下面我给出一段程序,网友可以自己修改,达到自己的要求。
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#define DIN P1.0
#define DOUT P1.1
#define SCLK P1.2
#define CS P1.3
//我设置config_data=0x0833,
//选择通道0.二进制输出。想修改通道,修改config_data相应的位就好了。
//data_out是输出的结果,有16bit,后面12bit是ADC结果。
void Configure_ADC7928(unsigned int config_data,unsigned int *data_out)
用户377235 2014-3-6 13:54