原创 XD1000™ FPGA COPROCESSOR MODULE

XD1000™ FPGA COPROCESSOR MODULE for SOCKET 940

XD1000™: Patent Pending

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XD1000™ Development System

Description

The XD1000™ allows the user to integrate Altera's leading edge Stratix™ II Field Programmable Gate Array (FPGA) technology into a multi-Opteron™ based system. The XD1000™ can be inserted directly into an Opteron™ 940 socket and uses the motherboard's existing CPU infrastructure to create a full featured environment for FPGA coprocessor functions. The module connects to the CPU's HyperTransport bus and motherboard DIMMs while utilizing the existing power supply and heat sink solution for the CPU. The XD1000™ provides a cost effective platform for FPGA acceleration that is deployable in the densest blade systems.

Features*

• HyperTransport Interfaces (HT)
  
• Multiple HT interfaces
  
• 16 bits wide @ 800 M Transfers/s
  
• Bridging to additional XD1000™ modules

• Memory Interface
  
• 128 bits wide DDR-333 memory
  
• 5.4 GBytes/s bandwidth
  
• Up to four 4GB DIMMs of registered/ECC memory

• SRAM
  
• 4 Mbytes of Zero Bus Turn-around (ZBT) SRAM
  
• 800 Mbytes/s bandwidth
  
• 32 bits wide with parity
  
• 5 clock cycle latency for reads @ 200MHz

• Flash ROM
  
• 32 Mbytes of Common FLASH Interface (CFI) FLASH
  
• Used for FPGA configuration files, or application data

• FPGA Configuration
  
• Auto FPGA configuration on power-up
  
• Host triggered FPGA reconfiguration

• Monitoring
  
• FPGA mastered I2C bus
  
• Voltage monitoring
  
• Temperature monitoring

• Test Support
  
• JTAG test port with FPGA reconfiguration
  
• 4 programmable LEDs
  
• 8 programmable test pads

• Mechanical
  
• Plugs directly into socket 940
  
• Fits within AMD specified Opteron™ retention frame
  
• 68 x 60 mm form factor
  
• Off-the-shelf Opteron™ heat sink can be used

• Development Package
  
• HyperTransport core
  
• Memory controller core
  
• Linux device driver
  
• FPGA messaging infrastructure