所需E币: 5
时间: 2019-12-24 20:21
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摘要:随着集成电路(Ic)加快速度,上升/下降时代的大多数脉冲和函数生成器(典型5ns)成为测量低于20ns的时间间隔不足。你可以克服这种限制与模拟交换机或先进的CMOS逻辑门,创建数字边速度更快。开通/这些开关关断时间产生非常快速上升/下降时间。单刀双掷(SPDT)开关,可以创建脉冲的高和低层次的是可编程。Maxim>AppNotes>SIGNALGENERATIONCIRCUITSSWITCHESANDMULTIPLEXERSKeywords:pulsegenerator,CMOSswitches,CMOSlogicgates,SPDTswitch,analogswitches,highspeedpulseJan31,2003generator,MAX4644,fastrise/falltimes,pull-up/pulldowndriver,SPDTanalogswitch,outputdriver,functiongenerators,fastdigitaledgeAPPLICATIONNOTE1866High-SpeedPulseGeneratorHasProgrammableLevelsAbstract:Asintegratedcircuits(ICs)speedup,therise/falltimesofmostpulseandfunctiongenerators(5nstypical)becomeinadequateformeasuringtimeintervalsbelow20ns.YoucanovercomethislimitationwithanalogswitchesoradvancedCMOSlogicgates,whichcreatefasterdigitaledges.Theturn-on/turn-offtimesfortheseswitchesproduceveryfastrise/fall……