标签: reconfiguration

   ThisapplicationnotedescribesaremotedynamicreconfigurationofExcalibur?deviceswithLinuxdemonstration.ThedemonstrationrunsonanEPXA1developmentboardandhasthefollowingfeatures:   AnApacheWebServerthatrunsasanapplicationintheoperatingsystem抯filesystem   Awebpagehostedontheboardthatallowsyoutouploada.tarfiletotheboardcontaininganFPGAhardwareimage,adriverforthishardware,andanapplicationtointerfacetothehardware   .tarfilesthatcontainasimpleperipheralI/OtoenabletheLEDstobecontrolledfromsoftware,andanLCDdrivertoenablecharacterstobeprintedontheLCDpanel……

   ThisapplicationnotediscussesLinuxoperatingsystemsandwalksyouthroughthestepsofrebuildingthedynamicreconfigurationofExcalibur?deviceswithLinuxdemonstrationfromthesourcecodetoarunningboard.ThedemonstrationexhibitsthecapabilityofExcaliburdevicestoperformthefollowingoperations:    runembeddedLinux    dynamicallyloadandunloaddevicedrivers    reconfiguretheFPGAportionoftheExcaliburdevicewithoutinterruptingtheoperatingsystemornetworkconnectivity……

【应用手册】DynamicReconfigurationofPMAControlsinStratixVDevicesThisapplicationnotedescribeshowtousethetransceiverreconfigurationcontrollertodynamicallyreconfigurethePhysicalMediaAttachment(PMA)controlsoftheStratix®Vtransceivers.YoucanreconfigurethefollowingPMAcontrolstooptimizesignalintegrityofallthehigh-speedlinksinyourStratixVdevice:■Transmitterpre-emphasis■Differentialoutputvoltage(VOD)■RXlinearequalization■RXbufferDCgainTheattachedreferencedesignprovidesanimplementationexampleofPMAcontrolsreconfiguration.Youcanmodifythereferencedesigntosuityoursystemrequirementsandperformanin-systemdebugofthehigh-speedchannelsinyourdesign.ThisapplicationnotedescribeshowtosimulatethisreferencedesignusingtheQuartus®IIsoftwareversion11.0andModelSim®version6.6d.DynamicReconfigurationofPMAControlsinStratixVDevicesAN-645-1.0ApplicationNoteThisapplicationnotedescribeshowtousethetransceiverreconfigurationcontrollertodynamicallyreconfigurethePhysicalMediaAttachment(PMA)controlsoftheStratixVtransceivers.YoucanreconfigurethefollowingPMAcontrolstooptimizesignalintegrityofalltheh……

【应用手册】DynamicReconfigurationofTransceiverChannelsUsingMultiplePLLsinStratixIVDevicesThisapplicationnotedescribeshowyoucandynamicallyreconfigureyourStratix®IVtransceiverchannelsusingthemultiplephase-lockedloop(PLL)dynamicreconfigurationfeature.ThisfeatureallowsyoutoreconfigureatransceiverchanneltoswitchamongPLLs(CMUPLLs)withinthetransceiverblockandthePLLs(CMUand[auxiliarytransmit]ATXPLLs)locatedoutsidethetransceiverblock.Usingthisfeature,youcanindependentlyswitchatransceiverchanneltoatleastfourindependentanddistinctdataratestypicallyrequiredbyuniversalfrontend(UFE)applications.■TheCMUPLL-baseddynamicreconfigurationfeatureallowsyoutoreconfigurethetransmittersideofatransceiverchannelindependentlybyeitherswitchingtooneofthetwoclockmultiplierunitPLLs(CMUPLLs)withinthetransceiverblockorbyreconfiguringaCMUPLLtothedatarateyourequire.However,withthisCMUPLLreconfigurationapproach,theotherchannelswithinthetransceiverblocklisteningtothesameCMUPLLarealsoaffected.DynamicallyreconfiguringusingmultiplePLLsovercomesthisissue.■Thefocusofthisapplicationnoteisaboutreconfiguringthetransmittersideofthetransceiverchannel.Becauseeachreceiverchannelhasadedicatedclockanddatarecovery(CDR)thatcanbereconfiguredtoanysupporteddatarate,thereconfigurationofthereceiversideisnotaffectedbyanyPLLresource.DynamicReconfigurationofTransceiverChannelsUsingMultiplePLLsinStratixIVDynamicReconfigurationofTransceiverChannelsUsingMultiplePLLsinStratixIVDevicesAN-607-1.2ApplicationNoteThisapplicationnotedescribeshowyoucandynamicallyreconfigureyourStratixIVtransceiverchannelsusingthemultiplephase-lockedloop(PLL)dynamicreconfigurationfeatur……

【应用手册】ImplementingPLLReconfigurationinCycloneIIIDevicesThisapplicationnotedescribestheflowforimplementingphase-lockedloop(PLL)reconfigurationinCyclone®IIIdevicesandhowtousethePLLreconfigurationfeature.Usethisapplicationnoteinconjunctionwiththefollowingliterature:■ClockNetworksandPLLsinCycloneIIIDeviceschapterinvolume1oftheCycloneIIIDeviceHandbook■Phase-LockedLoop(ALTPLL)MegafunctionUserGuide■Phase-LockedLoopReconfiguration(ALTPLL_RECONFIG)MegafunctionuserguideThisapplicationnotediscussesthefollowingtopics:■OverviewofPLLreconfigurationinCycloneIIIdevices■Completeflowonimplementingreal-timePLLreconfigurationfeatureinafrequencyprescalerapplication■Completeflowonimplementingdynamicphase-shiftingfeature■DesignconsiderationsthatyoumustconsiderwhenselectingPLLparametersforreconfigurationImplementingPLLReconfigurationinCycloneIIIDevicesAN507-2.0ApplicationNoteThisapplicationnotedescribestheflowforimplementingphase-lockedloop(PLL)reconfigurationinCycloneIIIdevicesandhowtousethePLLreconfigurationfeature.Usethisapplicationnoteinconjunctionwiththefollowingliterature:■ClockNetworksandPLLsinCycloneIIIDeviceschapte……

【应用笔记】在StratixIII和StratixIV器件中实现PLL重配置(ImplementingPLLReconfigurationinStratixIIIandStratixIVDevices)该应用笔记描述了在StratixIII和StratixIV器件中实现锁相环(phase-lockedloop,PLL)重配置的流程。Thisapplicationnotedescribestheflowforimplementingphase-lockedloop(PLL)reconfigurationinStratix®IIIandStratixIVdevices.ImplementingPLLReconfigurationinStratixIIIandStratixIVDevicesAN454-3.0ApplicationNoteThisapplicationnotedescribestheflowforimplementingphase-lockedloop(PLL)reconfigurationinStratixIIIandStratixIVdevices.Usethisapplicationnoteinconjunctionwiththefollowingliterature:■ClockNetworksandPLLsinStratixIIIDeviceschapterinvolume1oftheStratix……

【应用笔记】AN367:在StratixII器件中实现PLL重配置(AN367:ImplementingPLLReconfigurationinStratixIIDevices)锁相环(Phase-lockedloops,PLLs)使用几个分频计数器和不同的压控振荡器(voltage-controlledoscillator,VCO)相位节拍，来实现频率综合和相移。Phase-lockedloops(PLLs)useseveraldividecountersanddifferentvoltage-controlledoscillator(VCO)phasetapstoperformfrequencysynthesisandphaseshifts.InStratix®IIenhancedandfastPLLs,youcanreconfigureboththecountersettingsandphaseshiftthePLLoutputclockinrealtime.Youcanalsochangethechargepumpandloopfiltercomponents,whichdynamicallyaffectsthePLLbandwidth.YoucanusethesePLLcomponentstoupdatetheoutputclockfrequency,PLLbandwidth,andphaseshiftinrealtime,withoutreconfiguringtheentireFPGA.AN367:ImplementingPLLReconfigurationinStratixIIDevicesMay2009AN-367-2.1IntroductionPhase-lockedloops(PLLs)useseveraldividecountersanddifferentvoltage-controlledoscillator(VCO)phasetapstoperformfrequencysynthesisandphaseshifts.InStratixIIenhancedandfastPLLs,youcanreconfigureboththecountersettingsandphaseshiftthePLLoutputclockinrealtime.Youcanalsochangethechargepumpandloopf……

【应用笔记】在Stratix和StratixGX器件中实现PLL重配置(ImplementingPLLReconfigurationinStratix&StratixGXDevices)锁相环(Phase-lockedloops,PLLs)使用几个分频计数器和延时单元，来实现频率综合和相移。Phase-lockedloops(PLLs)useseveraldividecountersanddelayelementstoperformfrequencysynthesisandphaseshifts.InStratixTMandStratixGXenhancedPLLs,thesecountersanddelayelementsareconfigurableinreal-time.DesignerscanvaryoutputclockfrequencyandtimedelayinrealtimewithoutreconfiguringtheentireFPGA.ImplementingPLLReconfigurationinStratix&StratixGXDevicesDecember2005,ver.2.0ApplicationNote282IntroductionPhase-lockedloops(PLLs)useseveraldividecountersanddelayelementstoperformfrequencysynthesisandphaseshifts.InStratixTMandStratixGXenhancedPLLs,thesecountersanddelayelementsareconfigurableinreal-time.Designerscanvaryoutputclockfrequencyandtimedelayinrealtimewithoutreconfiguringtheentire……

【应用笔记】使用ALTERA_PLL和ALTERA_PLL_RECONFIG宏功能模块实现小数PLL重配置V1.1(ImplementingFractionalPLLReconfigurationwithALTERA_PLLandALTERA_PLL_RECONFIGMegafunctionsV1.1)本应用笔记介绍使用ALTERA_PLL和ALTERA_PLL_RECONFIG宏功能模块实现小数PLL重配置。Thisapplicationnotedescribestheflowforimplementingfractionalphase-lockedloop(PLL)reconfigurationanddynamicphaseshiftingforfractionalPLLsin28-nmdevices(Arria®V,Cyclone®V,andStratix®Vdevicefamilies)withtheALTERA_PLLandALTERA_PLL_RECONFIGmegafunctionsintheQuartus®IIsoftware.ImplementingFractionalPLLReconfigurationwithALTERA_PLLandALTERA_PLL_RECONFIGMegafunctionsAN-661-1.1ApplicationNoteThisapplicationnotedescribestheflowforimplementingfractionalphase-lockedloop(PLL)reconfigurationanddynamicphaseshiftingforfractionalPLLsin28-nmdevices(ArriaV,CycloneV,andStratixVdevicefamili……