标签: ise12

WhatisNewinISEDesignSuite12……

赛灵思产品选型指南ProductSelectionGuidesVirtexSeries....................................................................................................................................................2SpartanSeries...............................................................................................................................................6CPLDs...................................................................................................................................................................9ConfigurationStorageSolutions........................................................................................................11XilinxISEDesignSuite12..........……

ISE12主要信息：设计保存DesignPreservationDesignPreservationisaflowforcomplexdesignsthatpreservesimplementationresultsofamoduleforuseinthenextimplementationiteration.Often,complexmodulesinthedesignarenotchangingbutcanbedifficulttomeetQoRrequirements.Repeatedtimespentonthesemodulestryingtomaintaintimingisnotonlyfrustratingbutitisnotproductive.TheDesignPreservationflowsolvesthisissuebyallowingthecustomertomeettimingonthecriticalmodule(s)ofthedesignandthenre-usetheimplementationresultsinfutureiterations.Thiswillreducethenumberofimplementationiterationswhileinthetimingclosurephaseofthedesignandtheamountoftimeintheverificationphase.DesignPreservationSoftwareTheDesignPreservationflowutilizesPart……

ISE12主要信息：功耗优化PowerOptimizationISEDesignSuite12introducesthefirstautomated,intelligentclock-gatingtechnologyforFPGAdesign.Withthiscapabilitythetoolautomaticallyneutralizesunnecessarylogicactivity,reducingdynamicpowerusageupto30%.Auniquesetofalgorithmsautomaticallyidentifiesandneutralizesunnecessarylogicactivity,aprimarycontributortodynamicpowerinefficiencies.Thesealgorithmsutilizetheabundantclockenables(CE)foundintheVirtex-6FPGA.EachCEisideallysuitedforpoweroptimizationasitconnectstothebasicclusteroftheVirtex-6FPGAfabric(theSlice)andcontrolsasmallnumberofregisters(onlyeight).AlthoughtheuseofclockgatingtosuppressunnecessaryswitchinginFPGAsisnotanewconcept,intelligent,fine-grainclockgating……

ISE12主要信息：部分可重配置技术PartialReconfigurationPartialReconfiguration(PR)istheabilitytodynamicallymodifyblocksoflogicbydownloadingpartialbitfileswhiletheremaininglogiccontinuestooperatewithoutinterruption.XilinxPRtechnologyallowsdesignerstochangefunctionalityonthefly,eliminatingtheneedtofullyreconfigureandre-establishlinks,dramaticallyenhancingtheflexibilitythatFPGAsoffer.PartialReconfigurationSoftwareWiththereleaseoftheISEDesignSuite12.1,anewerainPartialReconfigurationhasbegun.ThesoftwaretoolsthatunlockthecapabilitytoreconfigureaportionofaXilinxFPGAwhiletherestofthedeviceremainsoperationalhavebeencompletelyredesigned.Thisnext-generationsolutionutilizesPartitions,amaturefeaturethatguarantee……

ISE12主要信息：AXI4AMBAAXI4InterconnectProtocolAMBAAXI4(AdvancedExtensibleInterface4)isthefourthgenerationofAMBAinterfacedefinedandcontrolledbyARM.Itisaninterfacedefinitiondefinedforhigh-performancesystemsanddesigns.AXI4isbeingadoptedbyXilinxasournext-generationinterconnectspecificationforFPGAdesignandwillshortlybeavailableforusewiththeSpartan-6andVirtex-6familyofdevices.HigherPerformanceAXIallowssystemstobeoptimizedforthehighestperformance,maximumthroughput,andlowestlatency.Thisflexibilityenablescustomerstobuildthemostcompellingproductsfortheirmarkets.EasiertoUseByconsolidatingabroadarrayofinterfacesintoone(AXI4),usersonlyneedtoknowonefamilyofinterfaces,regardlessofwhetherthey’reembedde……

赛灵思ISE12设计套件有望成为近十年来最受欢迎的产品，帮助您实现融合了无数障碍的、极具挑战的设计目标！你不仅要努力实现更高的性能指标，利用更先进的FPGA架构，并遵守更严格的功耗预算，而且还要满足紧缩得更短的开发进度。“少花钱多办事”或者“事半功倍”已经成为驱动当今FPGA设计流程发展的主题。WhitePaper:FPGAsWP361(v1.1)March31,2010MaintainingRepeatableResultsBy:KateKelleyMeetingthetimingrequirementsinadesigncanbedifficultinitself,butproducingadesignwhosetimingis100%repeatablecansometimesseemnearlyimpossible.Fortunately,therearedesignflowconceptsthatcanhelptomaintainrepeatabletiming……

AnOverviewofDeviceConfigurationusingiMPACT……

赛灵思ISE12设计套件有望成为近十年来最受欢迎的产品，帮助您实现融合了无数障碍的、极具挑战的设计目标！你不仅要努力实现更高的性能指标，利用更先进的FPGA架构，并遵守更严格的功耗预算，而且还要满足紧缩得更短的开发进度。“少花钱多办事”或者“事半功倍”已经成为驱动当今FPGA设计流程发展的主题。……