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DDR2与DDR3信号完整性及PCB设计SignalIntegrityandPCBlayoutconsiderationsforDDR2-800Mb/sandDDR3MemoriesFidusSystemsInc.900,MorrisonDrive,Ottawa,Ontario,K2H8K7,CanadaChrisBrennan,CristianTudor,EricSchroeter,HeikeWunschmann,andSyedBokhariSession#8.13AbstractThepaperaddressesthechallengeofmeetingSignalIntegrity(SI)andPowerIntegrity(PI)requirementsofPrintedCircuitBoards(PCBs)containingDoubleDataRate2(DDR2)memories.TheemphasisisonlowlayercountPCBs,typically4-6layersusingconventionaltechnology.Somedesignguidelineshavebeenprovided.1.IntroductionDDR2usageiscommontodaywithapushtowardshigherspeedssuchas800Mbps[1]andmorerecently,1066Mbps.DDR3[2]targetsadatarateof1600Mbps.FromaPCBimplementationstandpoint,apri……