标签: 差分

SGM58600 是 24 位的ΣΔ ADC 转换速度可达 60KSPS 。封装管脚排列与 ADS1255 相同。功能兼容。但 ADS1255 转换速度最高只能到 30KSPS 。 手册上描述， SGM58600 有两路输入，可以配置为一路差分，或两路单端输入。似乎是通过配置 MUX 寄存器实现。但是，这个看这个手册，并没有提及如何实现差分输入或单端输入。从芯片内部的示意图可以看出，信号经过输入选择分配器后，需要进入到后级差分缓冲器及 PGA ，内部 ADC 处理的仍然是差分信号。 查看手册关于输入多路分配器的描述可知，内部的差分输入正端和负端可以通过MUX寄存器进行配置。分别连接到AINx 或AINCOM上面。 如果要从 AIN0 采集信号， PSEL 显示需要设置为 0000 ，而 NSEL 应该设置为 1xxx 即负输入接到 AINCOM 。而 AINCOM 管脚可以固定接地。这样 ADC 实际处理的是 AIN0-AINCOM 这个差分信号。因为 AINCOM 接地，所以转换结果即为 AIN0 。实现单端信号采集。如果输入的单端信号较小，比如 uV 级别。为消除电路中的直流偏置，温度飘移等因素的影响，实际上可以通过配置 MUX ，将输入信号依次接到正输入端和负输入端。比如采集连接到 AIN0 的信号。可以设置 MUX 为 0x0F ，将 AIN0 信号接到正输入，采样结果为 a ，设置 MUX 为 0xF0 ，将信号接到负输入，采样结果为 b 。理论上 a = -b 。但实际上因为内部误差，漂移偏置等原因。 a 并不等于 -b 。可以认为 a 与 –b 里面包含了单方向的偏移量，可以使用 (a – b)/2 作为结果。提高转换精度。 差分输入的信号同理也可以交换正负输入，得到更准确的结果。设置 MUX 为 0x01 ， AIN0 接到差分正输入， AIN1 接到差分负输入。转换后得到正输出，修改 MUX 为 0x10 ，则可反接，转换后得到负输出。

首先，简要说一下 GPS 和 RTK 的工作原理。 GPS 定位的基本原理是，测量出已知位置的卫星到地面 GPS 接收器之间的距离，然后接收器通过与至少 4 颗卫星通讯，计算与这些卫星间的距离，就能确定其在地球上的具体位置。普通 GPS 的定位精度 ≥ 1 米，信号误差有 50% 的概率会达到 2 米以上。这一点被手机 GPS 导航坑过的人肯定有所体会。另外， GPS 无法支持精准定高，误差可能高达十几米。 GPS 定位误差是怎么产生的呢？ 1 、大气层影响：大气层中的电离层和对流层对电磁波的折射效应，使得 GPS 信号的传播速度发生变化，从而让 GPS 信号产生延迟。 2 、卫星星历误差：由于卫星运行中受到复杂的外力作用，而地面控制站和接收终端无法测定和掌握其规律，从而无法消除产生的误差。 3 、卫星钟差：卫星钟差是指 GPS 卫星时钟与 GPS 标准时间的差别。卫星上使用铯原子钟，所以两者的时间也许不同步，就像你的手表跟你家客厅挂钟的时间不同步一样 4 、多路径效应： GPS 信号也有可能是在不同的障碍物上反射后才被接收到，这就是所谓的 “ 多路径效应 ” 。 RTK (Real Time Kinematic), 即载波相位差分技术，它能够实时地提供测站点在指定坐标系中的三维定位结果，并达到厘米级精度。在 RTK 作业模式下，基站采集卫星数据，并通过数据链将其观测值和站点坐标信息一起传送给移动站，而移动站通过对所采集到的卫星数据和接收到的数据链进行实时载波相位差分处理（历时不足一秒），得出厘米级的定位结果。 要理解 RTK ，得先知道 “ 差分 ” 是什么？ 差分 就是把 GPS 的误差想方设法分离出。在已知位置的参考点上装上移动基站，就能知道定位信号的偏差。将这个偏差发送给需要定位的移动站，移动站就可以获得更精准的位置信息。 作为「无人机之眼」的定位系统，既是无人机实现自主飞行的关键，也是其进行各项植保作业的基础。研发和设计高精度的定位系统，一直是各大无人机厂商寻求技术突破的着力点。 目前无人机多采用 GPS 技术，但 GPS 定位误差带来的坑早已在行业内饱受诟病。 RTK 技术原本是军用技术， 2016 年，极飞推出 SUPER X2 飞控系统和 P20 2017 款植保无人机，搭载了 GNSS RTK 定位模块。随后，越来越多的无人机厂商开始投入到 RTK 产品的技术研发和系统整合中来。 一套 RTK 设备除了飞机上的定位模块，还包括 GNSS RTK 手持测绘器、 GNSS RTK 移动基站和 GNSS RTK 固定基站。如下图： 农业植保无人机真的有必要使用比 GPS 定位更精准的 RTK 吗？ 我们知道，我国农田的田埂宽度普遍较小，且多丘陵、山地等复杂地形，对植保无人机飞行航线的精度要求很高。如果不能做到精准喷洒，不仅达不到防治病虫害的效果，甚至还可能产生药害。传统植保无人机正是由于 GPS 定位偏差，会有掉高、飞不直等现象，常常出现重喷、漏喷等问题，如何实现精准喷洒一直是业内不遗余力攻克的技术难题。 RTK 技术的应用，可以说让植保无人机真正走上了精准作业之路。 精准作业体现在两个维度： 一是飞得精准， 即高精度自主飞行技术。通过 RTK 系统可获取准确的田地边界信息，将航线精度从米级提升至厘米级，且不需要人工遥控，实现全自主飞行和喷洒；同时让无人机自动避开房屋、树木、电缆等障碍物，避免了碰撞和炸机事故。 二是喷得精准， 可以通过精准变量喷洒技术来达到，同时妥善地解决了以往因 GPS 定位偏差而造成的重喷、漏喷等问题。 如果说定位系统相当于无人机的「眼睛」，那 GPS 好比是「近视眼」， RTK 则像是戴着高精度「智能眼镜」的「明眸」，既能准确识别各种障碍物，还能实时调整各种误差，真正实现精准定位。 RTK 价格偏高，真的值得消费者掏钱买单吗？ 的确， RTK 由于技术门槛高，价格并不「亲民」，市面上一套优质 RTK 系统的价格可能相当于一台植保无人机了。但是，仅仅因为价格偏高，就足以成为拒绝使用新技术的理由吗？ 七八十年代，电脑刚在国内出现时，也是大几千甚至上万的「天价」。但电脑的第一批用户中，很多利用这一新工具，发现了更多创造更大价值的机会。一台大型的农业机械设备，价格可达几十万甚至上百万，但农业机械化的第一批践行者，因为最快地走上了精准、高效生产之路，从而最早实现了发家致富。 有时候，价格不是问题，关键在于你买的产品能否给你带来相应的价值回报。 聪明的消费者，不如拿出账本好好算一算，一台新设备的使用，能在多大程度上提高作业效率，能为你节省多少生产成本。 农业植保服务的成本主要包括人工成本和设备成本。使用普通 GPS 的植保机，由于无法实现全自动飞行，需要三名操作人员，包括飞手、安全员和地勤，缺一不可。而一套装有高精度 RTK 系统的植保机，只需一名操作人员即可完成全套作业，人工成本降低至过去的三分之一。 在农业植保领域，定位精度正是提高系统作业精度的关键限制因素，一方面，定位精度这一变量直接影响到航线规划和药剂喷洒精准度等其它变量；另一方面，使用普通 GPS 的无人机在实际作业中的确受定位偏差影响很大，成为其明显的短板。而将 RTK 技术应用到植保无人机中，提高了飞行和喷洒的双重精准度，恰恰是突破这一关键限制因素的一剂良方。 随着技术成本的降低， RTK 系统大有可能成为行业应用级无人机的标配，也将在未来农业植保中得到越来越广泛的应用。

AM335x主控板的调试卡在了PHY芯片上，反复检查原理图和焊接AR8031，以及反复读取并理解AR8031寄存器的值之后，目前认为Ethernet的Auto-negotiation失败的原因可能是布线问题带来的。所以，暂时打算另外绘制PHY实验板，并且着重了解差分线的布线规则。 ## ** 谨以此文祭奠我第一块惨不忍睹的高速差分PCB板，哦耶 =_=!!! ** ## 1. 怎样使用Cadsoft Eaglel布差分线？ ============================================= Eagle布局弧线的能力简直无与伦比，同时它支持差分线的布局。在它的帮助手册中： Editor Commands - ROUTE - Differential Pair routing 里面描述了差分线的布局步骤。  * A differential Pair consists of two signals that have the same name, only one ending with _P (the "positive" signal) and the other one with _N (the "negative" signal), for instance CLOCK_P and CLOCK_N. The two signals must also belong to the same net class. （当net设置为*_P和*_N的时候，Eagle会认为它们是一对差分线，比如PHY芯片的TX_P和TX_N。当然这两个net要属于同一个net class，Eagle默认整块板都属于同一个class，class default。）  * When selecting an airwire of a Differential Pair, both signals are routed in parallel. The distance between the two signals as well as the wire and via sizes are determined by the signals' net class. This is done independent of the setting of "Options/Set/Misc/Auto set route width and drill". （当两根线是差分线时，它们的线宽、距离、过孔规格等等都由net class的特征决定，与当前的布线设置没有关系。在Edit - Net class...里面能够增加新的net class，设置好线宽、间距等等，然后将net的properties相应的修改过来，如图：）      (当点击Route按钮布局时，这对差分线就会同时出现，如图：)    * If you don't want to route both signals, you can press the ESCape key to drop the second airwire. （如果不想同时布这两根线，比如在RJ45变压器引脚附近的时候，可以使用ESC键丢掉第二根airwire。）    * At the beginning of routing a Differential Pair (when the starting points of the airwires don't have the necessary distance, yet) signal wires are generated from the starting points to the current mouse cursor position, according to the current wire bend style.  Note that there may be cases where these wires overlap, so please make sure you choose a proper point from where to start the actual paraller routing. （差分线的起点是鼠标当前的位置，并且基于现在的bend style，这可能会造成线的重叠（这个使用鼠标右键多点击几次，选择比较合适的bend style即可）。）  * The coordinates given while routing a Differential Pair form a "center line" along with the actual signal wires are placed left and right with the proper distance.  * Since the pads a Differential Pair is connected to typically don't have the same distance as used for the signal wires, you may have to route such signals from both ends. This means, you start at one part, route towards the other part, and then route the rest starting from the other part. This is necessary because only the first step in a routing sequence generates wires that start at positions that don't have a proper distance. （器件引脚离差分线的距离通常不一致，所以可以分别从两个器件开始布线，从而产生合适的间距。）    * If you route towards the wire end points of a Differential Pair in a different layer, and the wires are fully aligned, the proper vias will generated automatically.  （在不同层之间布差分线，vias会自动生成。如图所示：（当然过孔应该尽量避免））  * The special mouse key functions Shift+Left (place a via at the end point) and Ctrl+Left (define arc radius) don't work in Differential Pair mode. （Shift+Left以及Ctrl+Left快捷键是差分模式下是不能使用的。）    * Differential Pairs can only be routed fully manually. The Follow-me router and the Autorouter treat them like regular signals. （差分线只能手动布局。）   2. 在高速差分线中，经常听到阻抗这个概念，但一直没有弄清楚它的含义，因此趁调试PHY芯片的机会了解一下它，也学习其它的高速布线规范： ================================================================================== 《High-Speed Layout Guidelines》- Texas Instruments 1. Theoretical Overview 1.1 Electromagnetic Interference and Electromagnetic Compatibility Electromagnetic interference (EMI) is radio frequency energy that interferes with the operation of an electronic device. This radio frequency energy can be produced by the device itself or by other devices nearby. （EMI的概念。电磁辐射，主要指对其它设备的影响。） Electromagnetic compatibility (EMC) is the ability of an electronic product to operate without causing EMI that would interfere with other equipment and without being affected by EMI from other equipment or the enviroment. （EMC的概念。电磁兼容性，主要指设备自身不产生EMI，以及不受其它设备EMI影响的能力。） 1.2 Clock Signals （根据傅立叶变换可知，时钟信号由一系列的正弦信号和余弦信号组成，它们的频率幅值由时钟信号的上升下降沿决定。而且，频率越高，辐射越大。） 1.3 Transmission Lines If the lengths of traces are in the range of the signal's wavelength, the the user has to be consider the effects of transmission lines. The problem that a user must deal with are time delay, reflections, and crosstalk. To get a better understanding of these problems and where and how they arise, it is useful to know what transmission lines are. They are simply the traces on a PCB and depend on the length and the frequency of the signals passing through them. （如果传输线的长度在信号波长的范围内，就需要考虑传输线效应。） Many different structures of trace routing are possible on a PCB. Two common structures are shown in Figure 3. On the left, a microstrip structure is illustrated and on the right, a stripline technique. A microstrip has one reference, often a ground plane, and these are seperated by a dielectric. A stripline has two references, ofen multiple ground planes, and are surrounded with the dielectric. （很重要的微带线和带状线的概念。微带线走在表面，带状线走在内层；。带状线的辐射不会出去。）   Figure 3. Structure and Dimension of Microstrip and Stripline   Figure 4. Calculation of Properties of Microstrip and Stripline (AppCAD) 1.3.1 Signal Speed and Propagation Delay Time 1.3.1.1 Examples 1.3.2 Characteristic Impedence, Reflections, and Termination （当特征阻抗发生变化的时候，信号反射就会发生。极端情况比如特征阻抗从无穷大变成0的时候。反射系数描述了传输线阻抗和源阻抗之间的关系：当传输线阻抗为无穷大时，反射系数为1；当传输线阻抗为0时，反射系数为-1。为1意味着信号会完全反射回来。反射系数最好为0，也就是信号源阻抗最好等于传输线特征阻抗。） （下图是信号源阻抗为25欧姆，特征阻抗为50欧姆，负载阻抗无穷大时的信号波形：）   Figure 5. Over- and Undershoots Due to Incorrect Termination        (红线是理想波形，绿线是时钟输出点的实际波形，蓝线是传输线终点的波形。) （*之前调试74HC595串联的静驱数码管时，也遇到了时钟信号反射的问题，导致出现乱码。当降低了时钟线上升下降沿的频率，或者在时钟输出点放置50欧姆电阻，时钟波形会变好，乱码会消失。） 1.4 Crosstalk The mutual influence of two paraller, nearby routed traces is called crosstalk. One is called the aggressor (this trace carries the signal) and the other is called the victim (this trace is influenced by the aggressor). Due to the electromagnetic field, the victim is influenced by an inductive and a capacitive coupling. They generate a forward and a backward current in the victim trace whereas in a homogenous environment cancel each other. In a microstrip environment, the forward current of the inductive coupling tends to be larger than the influence of the capacitive coupling. To minimize the effects on crosstalk on adjacent traces, keep them at least 2 times the trace width apart.   （差分线的间距要在线宽的2倍以上。） 1.5 Differential Signals 1.6 Return Current and Loop Areas （高速电路的回流路径和低速电路不同，它是沿信号线的背面返回，因此要确保信号线的背面地平面连续。） 2. Practical PCB Design Rules 2.1 PCB Considerations During the Circuit Design  * What is the highest frequency and fastest rise time in the system?  * What are the electrical specifications at the inputs and outputs of the sinks and the sources?  * Are there sensitive signals to route - for example, think about controlled impedance, termination, propagation delay on a trace (clock distribution, buses, etc.)?  * Is a microstrip adequate for the sensitive signals, or it essential to use stripline technique?  * How many different supply voltages exist? Does each supply voltage need its own power plane, or is it possible to split them?  * Create a diagram with the functional groups of the system -e.g., transmitter path, receiver path, analog signals, digital signals, etc.  * Are there any interconnections between at least two independent functional groups? Take special care of them. Think about the return current and crosstalk to other traces.  * Clarify the minimum width, separation and height of a trace with the PCB manufacturer. What's the minimum distance between two layers? What about the minimum drill and the requirements of vias? Is it possible to use blind vias and buried vias?   2.2 Board Stackup （最好使用多层板，而且设置合理的板层用途。） 2.3 Power and Ground Planes As previously mentioned, a complete ground plane in high-speed design is essential. Additionally, a complete power plane is recommended as well. In a complex system, several regulated voltage can be present. The best solution is for every voltage to have its own layer and its own ground plane. But this would result in a huge number of layers just for ground and supply voltages. What are the alternatives? Split the ground planes and the power planes? In a mixed-signal design, e.g., using data converters, the manufacturer often recommands splitting the analog ground and the digital ground to avoid noise coupling between the digital part and the sensitive analog part. Take care when using split ground planes because:  * Split ground planes act as slot antennas and radiate.  * A routed trace over a gap creates large loop areas, because the return current cannot flow beside the signal, and the signal can include noise int the nonrelated reference plane.  * With a proper signal routing, crosstalk also can arise in the return current path due to discontinuties in the ground plane. Always take care of the return current.  * If possible, use a continues ground plane; do not split them. This can be achieved by a proper placement selection. Again, create functions blocks, and place and route them together. By doing this, the traces of a digital part cannot influence any trace of the analog part if these sections do not across each other. （使用整块地的方案是比较合适的，分隔的地会带来各种各样的问题，这和低速电路的概念是不一样的。） If split ground planes are essential:  * Do not route signals over a gap. Always strive for the return current flow with the smallest loop area.  * Connect split ground planes only at one point. More common ground connections can create ground loops, and this increases radiation.  * The return current of a subsystem (e.g., an analog system or transmitter path) must not be in the path of the other subsystem (digital system or receiver path). The return current should flow directly to the common ground point.  * Power planes should only reference their own ground plane. They should not overlap with another grond plane. This leads to capacitive coupling between the power plane and a not-referenced ground plane. Noise can couple into the other system.  * Do not connect bypass capacitors between a power plane and an unrelated ground plane. Again, noise can be coupled from one supply system into the other. This mistage can occur in the circuit design section.  （如果使用分隔地的话，需要。。。还是使用整块地吧！）    2.4 Decoupling Capacitors   Decoupling capacitors between the power pin and ground pin of the device ensure low ac impedance to reduce noise and to store energy. To reach low impedance over a wide frequency range, several capacitors must be used. This is why, a real capacitor consists of its capacitance and a parasitic inductance and register. Therefore, every real capacitor behaves as a resonant circuit. The capacitive characteristics are only valid up to its self-resonant frequency (SRF). Above the SRF, the parasitic effects dominate, and the capacitor acts as an inductor. With the use of several capacitors with different values, low ac impedance over a wide frequency range can be provided. （使用不同容值的电容组合来旁路，效果更好。） Capacitors with high values have low impedance in the lower frequency range and a low SRF, whereas small-valued capacitors have their SRF in the upper frequecy range. This depends on the equivalent series resistance (ESR) and the equivalent series inductance (ESL). A good comination of several capacitors leads to a low impedance over a wide frequency range. （高容值的电容在低频时有更低的阻抗，小容值的电容的共振频率在高频。） General rules for placing capacitors:  * Place the lowest valued capacitor as close as possible to the device to minimize the inductive influence of the trace. This is especially important for small capacitor values, because the inductive influence of the trace is not negligible anymore. （小容值的电容更应该靠近设备引脚，因为它的电感效应更明显。）  * Place the lowest valued capacitor as close as possible to the power pin/power trace of the device. （低容值的电容更靠近设备的电源引脚。）  * Connect the pad of the capacitor directly with a via to the ground plane. Use two or three vias to get a low-impedance connection to ground. If the distance to the ground pin of the device is short enough, you can connect it directly. （电容应该通过过孔接地，打两到三个过孔有利于减小阻抗。如果离地线够近，也可以值接连起来。）  * Make sure that the signal must flow along the capacitor. （确保信号和电容一起流动。（额，信号怎么和电容一起涅？）） 2.5 Trace, Vias, and Other PCB Components A right angle in a trace can cause more radiation. The capacitance increases in the region of the corner, and the characteristic impedance changes. This impedance change cause reflections. （布线的直角角度会引发辐射。拐角处电容会增加，特征阻抗会改变，从而引发信号的反射。）  * Avoid right-angle bends in a trace and try to route them at least with two 45° corners. To minimize any impedance change, the best routing would be a round bend. （走弧线，而不是直角。）  * Separate high-speed signal (e.g., clock signals) from low-speed signals and digital from analog signals; again, placement is important. （高速线与其它线分开。）  * To minimize crosstalk not only between two signals on one layer but also between adjacent layers, route them with 90° to each other.  （不同的差分线呈90°走在不同层。）         Figure 13. Poor and Good Right Angle Bends   The use of vias is essential in most routings. But the the designer has to be careful when using them. They add additional inductance and capacitance, and reflections occure due to the change in the characteristic impedance. Vias also increase the trace length.  （尽量避免过孔。）  * Avoid vias in differential traces. If it is impossible to avoid them, use vias in both traces or compensate the delay also in the other trace. （过孔的位置会影响回流路径。） （盲埋孔比通孔要好，是因为通孔造成了一个高阻抗的负载端。） Tips for routing traces and the use of vias:  * Do not use right-angle bends on traces with controlled impedance and fast rise time, respectively.  * Route the traces orthogonally to each other on adjacent layers to avoid coupling.  * To minimize crosstalk, the distance between two traces should be approximately 2 to 3 times the width of the trace.  * Differential traces should be routed as close as possible to get a high coupling factor. As a result of this, influenced noise is then a common-mode noise and is not a problem for a differential input stage.  * Do not use vias on traces with sensitive signal, if unnecessary.  *Be careful with the return current when changing the layers. Use ground vias around the signal via to make sure that the return current can flow as close as possible to the signal.  * Do not create slots, for example in the ground plane, by using closely placed vias.  * Consider stubs created by vias. If necessary, use blind vias or buried vias.   2.6 Clock Distribution Summary =============================================== 准备完知识之后，就可以下手更改俺的PCB板了！ 泪奔中～  

一直很迷茫为什么差分对间要加上一个电阻在+-信号之间，不知道大家有什么看法，请指教：   下面是看到网友的回答，不知道对不对： 1、 差分信号是对同一个信号的，经过一个电阻后，就可以相互以彼此作为参考，比如信号的变化的时候，两个信号同时在变，这样经过电阻分开后的两个幅度不同的信号在传输的过程中就不受其他噪声的影响！ 2、在高速PCB理论上面有提到， 差分线中间的电阻是用作差模信号的匹配 差分线分别接电阻到地是用作共模信号的匹配 如果差分线分别接电阻，而2个电阻的另一端同时接一个电容，电容另一端接地，这是同时做差模和共模匹配用的 相关的PCB走线知识可以参考高速PCB的一些书籍。

差分线的特征阻抗是指两条差分线之间的阻抗，由电感、电容、电阻决定。 在PCB制板时可以指定差分线的特征阻抗。 在接收端为了保证信号的完整性要有匹配电阻，一般为100欧姆（和差分线的特征阻抗相近）。