标签: acam

      德国ACAM公司提供各种TDC芯片，其中TDC-GPX是其提供的最高端的芯片，即便如此这款芯片也是在2005和2006之间推出的，此后一直没有新的类似芯片推出。“小众”应用的芯片，是因为用量少，所以不需要出多种型号的“新”芯片，还是因为多年来此领域并无大的创新而无新芯片推出？！        对于此款高端TDC芯片的应用场合，ACAM官方给出以下描述：        “The TDC-GPX is the most powerful member in ACAM‘s Time-to-Digital Converter product line. It is designed for applications that require fast measurement rates, best single shot precision and highest pulse pair resolution for measurement and digitization of time intervals. According to that, the device perfectly meets the requirements for technically sophisticated industrial, medical, and scientific application, like laser scanners, time-of-flight spectroscopy, coincidence measurements, PET-scanners, automatic test equipment.The TDC-GPX is the most powerful member in acam‘s Time-to-Digital Converter product line. It is designed for applications that require fast measurement rates, best single shot precision and highest pulse pair resolution for measurement and digitization of time intervals. According to that, the device perfectly meets the requirements for technically sophisticated industrial, medical, and scientific application, like laser scanners, time-of-flight spectroscopy, coincidence measurements, PET-scanners, automatic test equipment.”        附件是TDC-GPX的手册，该芯片分为四种工作模式，用户可以进行配置。第一种工作模式是我们需要用到的模式即I-Mode。        I-Mode：8通道，LVTTL输入，81ps精度        G-Mode：2通道，差分LVPECL输入，40ps精度        R-Mode：2通道，差分LVPECL输入，27ps精度        M-Mode：2通道，差分LVPECL输入，10ps精度          TDC-GPX的时间测量是基于内部delay-line的传输延时，而这些传输延时是和温度和核心电压相关的，同时也跟器件生产工艺相关，即不同器件之间存在差异。ACAM为此款芯片设计了一种精度可调模式，即应用其核心电压的变化来补偿温度和生产所带来的变化，使芯片的精度可以调整并被固定下来。                              图1： 测量精度随核心电压的变化关系                        图2： 测量精度随温度的变化关系            关于精度可调模式，TDC-GPX的手册中有非常详尽的解释。简单来说，就是首先用户可以先配置好自己希望的精度。TDC-GPX提供一个phase引脚用量控制并调节自己的核心供电模块的输出电压，ACAM推荐使用LM1117来给芯片供电，手册宣称其只对LM1117和317进行过测试，不保证其他LDO能用于精度可调模式。其实调节的原理就是TDC-GPX根据内部精度的变化会在phase引脚上输出一个可调的PWM波形，该引脚接到外部LM117的ADJ引脚上用于控制LM117的输出，这样就使得核心供电电压与温度的平衡从而达到精度固定，即精度完全独立于温度变化。       

前面我们说了TDC芯片的时间测量精度会随着温度、核心电压的变化而变化，而精度可调模式（Resolution Adjust Mode）利用内部对温度稳定非常精确的PLL来调整核心电压，从而使得测量的精度能被固定下来，因此我们可以说TDC-GPX的精度被固定在一个可调整的数值上。下图是该调整模式的硬件电路图：                      图1： 精度可调电路           下面是官方给出精度可调模式解释：           In Resolution Adjust Mode it is possible to adjust the resolution precisely via software. The adjusted resolution becomes completely independent of temperature, so no more calibration of the measuring circuit is necessary. The resolution remains stable due to the changes in the measurement core voltage, which is regulated via PLL (Phase Locked Loop). For that purpose, the TDC-GPX phase output provides a pulse width modulated signal for the external PLL regulation loop. This signal is derived from TDC-GPX reference clock and regulates the TDC-GPX core voltage. As soon as the PLL has locked, the resolution becomes stable. The absolute precision of the resolution only depends upon the used reference oscillator at this point. The range for resolution adjustment can reach values from -30% up to +8% of the normal resolution at 5 V and 25°C, so you should however realize that not every resolution is compatible with the full permissible temperature range. Before setting the resolution parameter, potential temperature variations should be considered, since they need voltage margin for compensation. A careless choice may end up in an undefined resolution. This would be the case e.g. when regulated voltage is close to maximum permitted voltage (say 5 volts) and temperature rises so high, that voltage being regulated right up to 5 volts, the high end, becomes insufficient. The PLL comes to the limit and then locks off.

Q:  I’m planning to use the device in a specified temperature range, e. g. between –20 °C to +50 °C. So what resolution should be selected, in order to be sure that the device stays locked within the whole temperature range?   A: In this case there are two items that mainly have to be considered. First the intrinsic resolution of the device that slightly varies from chip to chip, and secondly the temperature range that is specified in your application. At 3.3V Vddc and 25 °C junction temperature the intrinsic resolution of the TDC-GPX ranges typically between 68ps to 89 ps.Additionally, the above specified environmental temperature range of your application introduces an additional timing variation. Basically the resolution degrades at rising and improves at lower temperatures, but the dependencies are described in detail in the “General Timings Resolution”-Section of the TDC-GPX datasheet. The following two extremes have to be considered: At -20°C the resolution of the devices, that are specified with 68ps resolution increases to 0.923 x 68ps = 60 ps. At +50 °C the timing of the devices with 89ps decreases to 1.043 x 89 = 92.8 ps. Or in order words, without resolution adjust the GPX resolution may vary between 60ps to about 93ps for the above specified temperature range. This has to be compensated by regulating the supply voltage of the measurement core’s hardmacro (Vddcc-h). The maximal adjustment range lies between 2.3 V and 3.6 V, so we again have to consider the following limitations: With Vddc-h = 2.3V the 60ps resolution can be degraded to 60ps x 1.4 = 87.8ps With Vddc-h = 3.6V the 92.8ps resolution can be improved to 92.8ps x 0.93 = 86.3 ps. In other words again: The timing of the devices with 60ps resolution can be degraded to 87.8ps by decreasing Vddc-h to 2.3 V. The timing of the devices with 92.8ps resolution can be improved to 86.3ps by increasing Vddc-h to 3.6 V. Selecting a resolution between 87.8 and 86.3ps now ensures that the TDC-GPX stays locked within -20°C to +50 °C.

ACAM的TDC-GPX是基于时间戳的TDC，也就是说其根本原理还是基于延时线即delay-line。其手册里没有详细介绍其原理（这是人家的机密），只是简单简单其测量精度来源于内部传输延时（internal propagation delay）。下图是TDC-GPX在I模式下的技术指标： 这个表提示我们，如果我们要设计基于FPGA的TDC，你将要提供的指标参数要与上述指标看齐，至少需要提供上述指标的测试报告吧（Test Report）。 这个图还有一个最最重要的参数没有给出，就是时间测量精度。其实这个测量精度就是取决于延时线每个延时单元的延时，如果是进行基于FPGA的TDC设计，我们首先映入脑海的就是逻辑延时或者门延时。在前面介绍TDC的时候有关于延时线的种类中有介绍门延时。在FPGA范畴里也有一个门延时的概念，在当年的FPGA里给客户看到最新单元是LE（logic element），ALTERA有个LCELL的东东，人们最先想到的是用它来作为延时线的基本延时单元。但是我们知道LCELL这个东东除了前面提到的门电路延时线里的缺点以外，还有两个重要的缺点就是基本延时时间太大，所以就是设计出来TDC的精度也不高，另一个缺点就是基于LCELL的延时线每次编译的结果会不一样，因为软件会随机的分配每一个LCELL的位置，当然设计者也可以通过添加位置约束来控制LCELL的位置，但是这将是一项繁琐的工作，后面我们介绍为何这是项繁琐的工作。   既然LCELL不是最佳的延时单元，那么FPGA内还有什么可以作为最佳的延时单元呢？答案是进位链（carry-chain）。为什么carry-chain可以呢？这里卖个关子，这里先给出carry-in到carry-out的延时时间，下图是在ArriaGX上得到的此时间：   看出端倪了吧，哈哈，清一色的51ps呐。51ps延时时间，意味着51ps的时间测量精度，想想大部分需要TDC的应用都应该能满足了吧！！！