标签: simultaneous

1769-ASCIISimultaneousMode

Abstract:Multichannelanalog-to-digitalconverters(ADCs)typicallyconverteachinputchannelsequentiallyusinganinputmultiplexer.Certainapplicationsrequiresimultaneousconversions,especiallywhenphaseinformationexistsbetweendifferentchannels.Forexample,wirelessapplicationsrequireIandQchannelstobeconvertedatthesameinstance,motorcontrolandpowermonitoringrequiresvoltageandcurrentmeasurementsandthephaseanglebetweenthem.Inthepast,simultaneoussamplingmeantthedesignerhadtousemultipleADCs,andperformparallelconversionsoneachchannel.SimultaneoussamplingADCsnowperformthetaskusingmultipleT/Htosampletheinputsatthesameinstant,thenperformtheconversionforeachchannel.Maxim>AppNotes>A/DandD/ACONVERSION/SAMPLINGCIRCUITSKeywords:simultaneoussamplingADC,analogtodigitalconverters,ADCs,analogdigital,MAX126,MAX126,Oct01,2000MAX115,MAX116,T/H,MUX,simultaneoussampling,motorcontrol,I/Qsampling,wireless,I/Q,Coriolis,Mass-flow,powerfaultAPPLICATIONNOTE290ADCsforSimultaneousSamplingAbstract:Multichannelanalog-to-digitalconverters(ADCs)typicallyconverteachinputchannelsequentiallyusinganinputmultiplexer.Certainapplicationsrequiresimultaneousconversions,especiallywhenphaseinformationexistsbetweendifferentchannels.Forexample,wirelessapplicationsrequireIandQchannelstobeconvertedatthesameinstance,motorcontrolandpowermonitoringrequiresvoltageandcurrentmeasurementsan……

【应用手册】CycloneIIISimultaneousSwitchingNoise(SSN)DesignGuidelinesLow-costFPGAsdesignedon90-nmand65-nmprocesstechnologiesaremadetosupporthighperformanceapplicationswithsystemclocksandinterfacessuchasDDR2pushing200MHzandLVDSapplicationsupto840Mbps.Thedeviceisdesignedwithfastedgerateswhichcancausesignalintegrityproblemssuchassimultaneousswitchingnoise(SSN)whichmaylimitsystemperformanceandaffectcircuitoperation.Theseproblemscanexistevenatlowdataratesasthesignaledgerateremainsthesameregardlessofthedatarate.ForhighperformanceapplicationssuchasDDR2interfaces,Altera®haslargelydonetheworkbypreassigningDQandDQSsignalsandaccountingforSSNwhensettingperformancelimits.Forotherapplications,itisuptothedesignertodeterminethepinplacementandI/Osettingstooptimizeperformance.Byfollowingsomesimpleguidelinesandbestpracticesfordevicesettings,pin-outselection,andPCBdesign,youcanavoidmanyofthesignalintegrityproblemsforyourdesigns.ThisapplicationnoteprovidesaframeworktodescribeSSNandunderstandthesourcesofSSN,discusseswaystomitigateSSNforCyclone®IIIFPGAsbyusingI/OsettingsandselectingproperI/Ostandards,andprovidesguidelinesonPCBdesignthataregoodpracticeforgeneralhighspeeddigitaldesigns.Todemonstratetheeffectsofthevariousrecommendations,characterizationdatameasuredonCycloneIIIdevicesisshownthroughout.CycloneIIISimultaneousSwitchingNoise(SSN)DesignGuidelinesDecember2007,ver.1.0ApplicationNote508IntroductionLow-costFPGAsdesignedon90-nmand65-nmprocesstechnologiesaremadetosupporthighperformanceapplicationswithsystemclocksandinterfacessuchasDDR2pushing200MHzandLVDSapplicationsupto840Mbps.Thedeviceisdesignedwithfastedgerateswhichcancausesignalintegrityproblemssuchassimultaneousswitchingnoise(SSN)……

LNADesignUsesSeriesFeedbacktoAchieveSimultaneousLowInputVSWRandLowLNADesignLNADesignUsesSeriesFeedbacktoAchieveSimultaneousLowInputVSWRandLowNoiseByDaleD.HenkesSonyPMCAhenoisefigureofaZsourceZloadZinZoutsinglestagetransistoramplifierisafunctionoftheimpedZganceappliedtotheinputTransistor/terminalsofthetransisInputOutputTwo-Porttor.Thisimpedance,ZLmatchingmatchingS11S12calledthesourceimpednetwork[S21S22]networkance,isshowninFigure1asZsource.TypicallythesourceimpedancethatproducesaconjugateGS,GOptGLGinGoutmatchtotheinputimpedanceofthetransistor(Zin)isnotthesamesFigure1.Thegeneralizedanalyticalformofthelownoiseamplifier.impedanceaswouldberequiredtoproduceaminimumnoisefigurefortheamplifier.Theoverallsystemperformanceisproba……

simultaneousswitchingnoisei...,simultaneousswitchingnoiseinibismodels……

LNADesignUsesSeriesFeedbacktoAchieveSimultaneousLowInputVSWRandLowNoiseLNADesignLNADesignUsesSeriesFeedbacktoAchieveSimultaneousLowInputVSWRandLowNoiseByDaleD.HenkesSonyPMCAhenoisefigureofaZsourceZloadZinZoutsinglestagetransistoramplifierisafunctionoftheimpedZganceappliedtotheinputTransistor/terminalsofthetransisInputOutputTwo-Porttor.Thisimpedance,ZLmatchingmatchingS11S12calledthesourceimpednetwork[S21S22]networkance,isshowninFigure1asZsource.TypicallythesourceimpedancethatproducesaconjugateGS,GOptGLGinGoutmatchtotheinputimpedanceofthetransistor(Zin)isnotthesamesFigure1.Thegeneralizedanalyticalformofthelownoiseamplifier.impedanceaswouldberequiredtoproduceaminimumnoisefigurefortheamplifier.Theoverallsystemperformanceisproba……