tag 标签: testbenches

相关资源
  • 所需E币: 1
    时间: 2022-5-5 18:47
    大小: 11.87MB
    WritingTestbenches-FunctionalVerificationofHDLModels,2ndedition
  • 所需E币: 3
    时间: 2020-1-14 18:49
    大小: 2.02MB
    上传者: 2iot
    WritingTestbenchesusingSystemVerilogWritingTestbenchesusingSystemVerilog____________________________WritingTestbenchesusingSystemVerilogbyJanickBergeronSynopsys,Inc.13JanickBergeronVerificationguild.comWritingTestbenchesUsingSystemVerilogLibraryofCongressControlNumber:2005938214ISBN-10:0-387-29221-7ISBN-13:9780387292212ISBN-10:0-387-31275-7(e-book)ISBN-13:9780387312750(e-book)Printedonacid-freepaper.¤2006SpringerScience+BusinessMedia,Inc.Allrightsreserved.Thisworkmaynotbetranslatedorcopiedinwholeorinpartwithoutthewrittenpermissionofthepublisher(SpringerScience+BusinessMedia,Inc.,233SpringStreet,NewYork,NY10013,USA),exceptforbriefexcerptsinconnectionwithreviewsorscholarlyanalysis.Useinconnectionwithanyformofinformati……
  • 所需E币: 5
    时间: 2020-1-14 19:12
    大小: 3.92MB
    上传者: 2iot
    发几本新书吧!,WritingTestbenches-FunctionalVerificationofHDLModels(JanickBergeron)……
  • 所需E币: 5
    时间: 2020-1-14 19:24
    大小: 96.19KB
    上传者: quw431979_163.com
    ArtofWritingTestBenches.pdf,ArtofWritingTestBenches……
  • 所需E币: 0
    时间: 2020-2-14 15:52
    大小: 121.74KB
    上传者: quw431979_163.com
    ArtofWritingTestBenchesArtofWritingTestBencheshttp://www.asic-world.com/verilog/art_testbench_writing.htmlJan-2-2006IntroductionBeforeyouStartExample-CounterCodeforCounterTestPlanTestCasesWritingTestBenchTestBenchTestBenchwithClockgenTestBenchcontinues...AddingResetLogicCodeofresetlogicAddingtestcaselogicTestCase1-Asserting/De-assertingresetTestCase2-Assert/De-assertenableafterresetisapplied.TestCase3-Assert/De-assertenableandresetrandomly.AddingcompareLogicIntroductionWritingtestbenchisascomplexaswritingtheRTLcodeitself.ThisdaysASIC'saregettingmoreandmorecomplexandthusthechallengetoverifythiscomplexASIC.Typically60-70%oftimeinanyASICisspentonverification/validation/testing.Eventhoughabovefactsar……