tag 标签: chip

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  • 热度 29
    2015-4-24 14:32
    3369 次阅读|
    5 个评论
    智能手表(Smart Watch)、智能眼镜商机应用势头正快速崛起,智能可穿戴产品毫无疑问已成为最热门的电子产品之一。可穿戴技术推进了人类生活的智能化、特别是移动健康、移动医疗技术的发展,与之相对应的各类元器件的设计也越来越微型化、结合FPC主板生产组装与整机装联应用,更成为电子制造业的热点与难点。 日前在NEPCON China 2015展“智能可穿戴论坛”上,关注焦点就定格在了智能可穿戴设备的制造挑战与应对趋势上。对于智能可穿戴产品的新特点,众多与会专家表示,内部元器件的微小型化、高集成度特点增加了电子制造的难度。中兴通讯股份有限公司物流体系工艺研究部总工刘哲表示:“智能可穿戴产品的出现使产品组装面临高密度、微型化的新挑战。其中包括裸晶圆(‘Naked’dies)、元器件堆叠(3D封装/PoP)、集成埋入式元件、更小的元件间隙、更好的构造以实现基板更小等特点,使元器件的微小型化和高密度组装受到工程师们的广泛重视。我们可以看到目前诸如01005微型元器件已大量使用在新型的智能手机和可穿戴产品中,而03015也已实验应用,相信不久就会出现在具体产品中。WLCSP等微型器件的大量应用、FC与PoP技术的应用、以及趋势性的埋入式技术的应用都对产品组装难度,工艺难点提出新要求。”  针对微型元器件的组装工艺与技术趋势,刘总工谈到了01005组装工艺技术、WLCSP组装工艺技术、FC组装工艺技术及埋入式技术,对智能可穿戴产品制造的影响及具体技术实现。“无源器件的尺寸变小已是绝对趋势,新型的极限尺寸将会达到0402、03015、0201(公制),目前公制03015元件正在评估做应用导入。”刘哲认为对于01005元件的成功组装,最优化设计及DFM的主要因素可包括:PCB或FPC的拼板尺寸、焊盘尺寸及形状、基准识别点、阻焊膜工艺及厚度;元件的料带精度,焊锡膏型号(Type4或Type4.5)及品质;钢网的制作及开孔工艺,载板治具的设计和制作精度,搞好FAICPK的管控;在机器设备方面,印刷机、贴片机精度(+/-0.05mm)、吸嘴的保养及Feeder,制程能力(CPK)应不低于B级(1.33CPK=1.0)等诸多方面。 (详见演讲资料下载,仅供学习参考) 针对WLCSP封装,刘哲认为:“WLCSP封装是穿戴设备的核心组件,其设计和组装要充分考虑可靠性要求,需要情况采用Underfill以提高组件的长期可靠性。  FC(Flip Chip 倒装芯片)是裸芯片封装技术之一,对于FC的组装工艺技术,刘哲表示,“FC是芯片互连技术,也是理想的芯片粘接技术。FC向制造者提出了一系列严峻挑战,为这项复杂的技术提供封装、组装及测试的可靠支持。超声热压焊可适用在金凸点与镀金焊盘的组合,可缩短加工处理时间,也会面临可靠性的缺陷。”  埋嵌式技术是智能可穿戴产品发展趋势性技术,主要包括埋嵌电阻、电容、电感及裸芯片等四类技术。据刘哲介绍:“埋嵌无源和有源器件集成PCB可以实现元器件的三维布局设计,在同面积布置更高密度的元器件,具有更高集成密度、提高可靠性、符合整机系统低成本、微小型化的要求。需要考虑设计、组装、加工的整合统一。” (详见演讲资料下载,仅供学习参考) 对于参与或是想要参与可穿戴产品设计制造的工程师们,刘哲最后给出建议:“可穿戴产品的引入是一个结合点,是封装技术、PCB加工技术、SMT等相关技术的结合,使工程师们的专业界限变得模糊,我们需要成为整合PCB、SMT和封装各类技术支持的工程师。只有这样才能在可穿戴产品的制造过程中更游刃有余。”  
  • 热度 22
    2014-10-15 16:15
    2243 次阅读|
    1 个评论
    I was just meandering my way around the Adafruit.com website -- as you do -- when I stumbled upon something that made me gasp with awe and admiration (I'm just thankful I didn’t squeal with delight).   This is such a cool idea -- it's a XL741 Discrete Op-Amp Kit from those little scamps at the Evil Mad Scientist Labs. As it says on the Adafruit website: "This is a faithful and functional transistor-scale replica of the µA741 op-amp integrated circuit, the classic and ubiquitous analog workhorse."       In fact, this is an implementation of the "equivalent circuit" from the original Fairchild µA741 datasheet. It comes with terminal posts and solder points so that you can actually connect to it and build up classic and functional op-amp circuits.   But wait, there's more, because I then ran across this Discrete 555 Timer Kit , which also comes from the little rapscallions at the Evil Mad Scientist Labs. In this case, we're talking about a functional transistor-scale replica of the classic NE555 timer integrated circuit, which the Adafruit website correctly describes as "One of the most classic, popular, and all-around useful chips of all time."     I am completely blown away. I think this is a wonderful idea. I only wish I'd thought of doing something like this myself. In addition to being great to play with oneself, these kits provide an absolutely brilliant tool for teaching basic principles to newcomers to electronics. Now I think I want to learn more about those little rascals at the Evil Mad Scientist Labs...
  • 热度 19
    2014-5-2 16:01
    1326 次阅读|
    0 个评论
    All engineers must have had the unfortunate experience of verifying a part's availability with a vendor, only to have the part ultimately wind up either not getting produced or unexpectedly canceled.   Enter an engineer I once worked with who had a serious knack for choosing seemingly phantom components that never made it to the final design. In fact, he had such an extensive track record for doing this that we called him “Mr. VVI” behind his back: for Vanished Vendor Item.   Mr. VVI gave every other engineer in the department grief for being “a dinosaur.” In his mind, the fact that we all used components that were tried and true meant that we were highly unimaginative engineers who always played it safe. As far we he was concerned, we might as well have been living in the La Brea tar pit.   We stood by, quietly gleeful as he racked up thousands of dollars in redesigns to compensate for his vanished vendor items in project after project.   There was a lot of competition in the late 1980s among AMD, IDT, Cypress, and other semiconductor companies to develop the fastest FIFO. Naturally, Mr. VVI just had to use the fastest one advertised, which, as I recall was 25 nanoseconds read time. The rest of us got by with a relatively sluggish 50 ns.   Since Mr. VVI had received actual sample devices, he decided to put sockets on his board (he would need them!). He had his circuit card populated and proceeded with testing.   Although all of the control signals seemed correct, he was not able to get any output from the FIFO. There wasn't much sympathy among the ranks, I can tell you that.   After a couple of weeks, he took the chip over to the reliability lab. They popped the cover off the chip and discovered that there was no die inside!   In the two months since he had received the samples and subsequently discovered the empty chips, the manufacturer was able to get the chips to work in functional units. So Mr. VVI got a “mulligan.”   Dwight Bues graduated from Georgia Tech with a BSEE in computer engineering. He has worked in power generation, communications, RF, command/control, and test systems for 30+ years. He is a Certified Scrum Master and teaches courses in architecture, requirements, and IVVT.
  • 热度 26
    2013-7-16 20:26
    7176 次阅读|
    0 个评论
    According to Karen Savala, president of the fab tool trade group SEMI Americas, the United States is experiencing a renaissance in manufacturing, and the semiconductor industry is going along for the ride. OK, Savala is not an impartial observer. Her job is to promote North American semiconductor capital equipment vendors, and the notion that chip building can make a comeback in the US is mighty appealing to SEMI member companies. For years, the conventional wisdom has been that chip making—like just about all other high-tech manufacturing endeavors—is slowly (or not so slowly) shifting to Asia, where less expensive labour and often more favourable tax policies make it more economical. But Savala, citing a recent Time magazine article , maintains that manufacturing in general is making a comeback in the US, and that chip making and other high-tech manufacturing operations are a big part of it. "High-tech manufacturing is thriving in the US, and some is even return to the US," she said Monday at a kickoff press conference for the annual Semicon West tradeshow in San Francisco. There has been much activity in recent years in upstate New York, where a number of semiconductor RD consortiums are getting down to work. Globalfoundries has built a massive fab there. But is that enough to be considered a renaissance? Savala said the increasing complexity of chip manufacturing favours close geographic proximity to fabless chip vendors, the semiconductor supply chain, and RD. Most of those are still found in the US. She also cited a "growing recognition of the importance of public-private partnerships in high-tech manufacturing," including the Global 450mm Consortium in New York. The building of chips on 450mm wafers will get its start in the US, and the first generation of 450mm megafabs will be located in the US. In addition, Savala mentioned US President Barack Obama's recent visit to an Applied Materials facility in Austin, Texas, as well as several examples from Obama's most recent State of the Union address that would appear to support high-tech manufacturing in the US. "At SEMI, we believe there is a renewed appreciation that semiconductor manufacturing is one of the most important industries in the US," she said. Savala cited Semiconductor Industry Association statistics that put total direct semiconductor employment in the US at nearly 245,000 and growth in the US chip manufacturing workforce at 3.7 per cent for 2011—three times the rate for the broader US economy. She also said that the chip industry is responsible for creating more that 1 million jobs in the supply chain and related US sectors, and that semiconductors are one of the leading US export categories—larger than corn, wheat, and soybeans combined. Again, consider the source. A comeback by the US chip building industry would be good for Savala and for SEMI. She makes some good points, but calling this a renaissance still seems like a reach. What do you think?   Dylan McGrath EE Times  
  • 热度 21
    2012-3-20 14:47
    1727 次阅读|
    0 个评论
    FLIP CHIP焊点失效机理     FLIP CHIP 所谓倒装芯片字面意思为“将芯片翻转过来”,针对以往的引线接合结构(芯片面向上,用引线连接,其引线连接到引线框的结构称为Face-up结构),倒装芯片的结构则是将功能面  ,与基板直接用焊料凸点(solder bump)接合的结构。倒装芯片技术可大大缩小封装体积,在高密度和低成本上有一定的优势。     倒装芯片可靠性要求 倒装芯片组装品曝露的环境跨度很大,其中包含有:机械性冲击及振动、制造过程中受化学性/温度环境的影响、使用环境下的环境应力等。 由环境诱导的热膨胀和机械应力分散在所有的焊料接合处,而且焊料接合处的形状因工艺的差异、最终组装品强度的不同而成为决定性因素。     为提高倒装芯片组装品的可靠性,可在芯片底部填充树脂填料(under fill)。适当的底部填料可以分散因热膨胀系数不同引起的应力,其结果可以缓和互连部分应力,延长寿命。底部填料除了可用于更严酷的环境下,更适用于大型芯片,但是并不能说所有的组装品都需要。如果材料和生产工艺控制不当,采用底部填料有时也会诱发其它失效模式。     失效机理 影响软钎焊可靠性的主要失效机理是由于可诱发蠕变和疲劳等热-机械性工艺造成的损伤蓄积引起的。此外还有造成短路和开路的电子迁移、热迁移而产生故障。与热-机械性故障同时发生的电气故障则是由于存在产生化学反应或造成腐蚀的特定物质,存在加速迁移的金属离子等参与的结果。     热疲劳和蠕变的相互作用 焊料接合处在温度循环过程中会产生很大的剪切应力,剪切应力是由于裸芯片与衬底间热膨胀率不匹配而产生的,周期性温度变化引起焊料接合处周期性应力变化。从这种意义来讲,在焊料接合处产生了热疲劳。 蠕变是指材料在长时间的恒温、恒应力(即使应力小于该温度下的屈服强度)作用下缓慢产生塑性变形,这种变形最终会导致断裂。当约比温度大于0.4时最容易发生蠕变(约比温度=T/Tm ,T:环境温度;Tm:焊料熔点,均为绝对温度)。器件的温度循环通常在0.4Tm~0.8Tm之间,当被施加载荷时,蠕变变形通过位错滑移、晶界滑动及空位扩散等方式进行。 器件在实际使用过程中热疲劳和蠕变同时发生相互作用,共同对产品可靠性产生影响。     剪切应力 剪切应力对焊料接合处影响是显著的。剪切应力和焊料接合处的形状密切相关,剪切应力与接合高度成反比。最理想的是瘦长形焊料柱将应力分散在焊料接合处内部,可延长疲劳寿命。矮胖形且有近似凹型under fill凸点合金(UBM)的接合,其寿命较短。     加速寿命试验 要对实际使用状态下的器件做寿命试验,则需要与设计寿命相当的时间。所以封装品要通过加速温度循环来试验,即扩大温度范围、缩短各自高低温的曝露时间。通过扩大温度范围,焊料接合处曝露于因不同材料间热膨胀率不匹配产生的剪切应力中。扩大温度范围,虽然焊料接合处蓄积的损伤会增加,但如果有充足时间焊料接合处应力就会缓和,如果温度上升/下降时间或曝露时间小于应力缓和所需的时间,那就是真正典型的加速试验了,也就是说试验中的应力累积不会使接合处的应力完全达到缓和状态。但是我们也要认识到大大超过实际使用温度的试验会产生多种在实际使用过程中不可能发生的失效模式。
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    Abstract:Thisarticleprovidesageneraloverviewofthe1-Wiretechnology,itscommunicationconceptand,asabenefitofthelowpincount,unusualpackageoptions.Themainsectiondiscusses1-Wiredevicesbytheirfeaturesetandexplainsthetypicalapplications.Thearticleendswithpracticalinformationonhowtoevaluate1-Wiredevices,explainsdevicecustomizationoptions,andreferencesresourcesthatassistcustomersinintegrating1-Wiretechnologyintheirsystems.Overviewof1-WireTechnologyandItsUseBy:BernhardLinke,PrincipalMemberTechnicalStaffJun19,2008Abstract:Thisarticleprovidesageneraloverviewofthe1-Wiretechnology,itscommunicationconceptand,asabenefitofthelowpincount,unusualpackageoptions.Themainsectiondiscusses1-Wiredevicesbytheirfeaturesetandexplainsthetypicalapplications.Thearticleendswithpracticalinformationonhowtoevaluate1-Wiredevices,explainsdevicecustomizationoptions,andreferencesresourcesthatassistcustomersinintegrating1-Wiretechnologyintheirsystems.WhatIs1-WireTechnology?Thebasisof1-Wiretechnologyisaserialprotocolusingasingledatalineplusgroundreferenceforcommunication.A1-Wiremasterinitiatesandcontrolsthecommunicationwit……
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    时间: 2019-12-24 22:04
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    上传者: 2iot
    Abstract:Atwo-stage1.9GHzmonolithiclow-noiseamplifier(LNA)withameasurednoisefigureof2.3dBandanassociatedgainof15dBwasfabricatedinastandardsiliconbipolartransistorarray.Itdissipates5.2mWfroma3Vsupplyincludingthebiascircuitry.Inputreturnlossandisolationare-9dBand-20dB,respectively.Maxim>AppNotes>ASICsWIRELESS,RF,ANDCABLEKeywords:Maxim,QuickChip,siliconbipolar,LNA,1.9GHz,QuickChip9,semi-custom,ASIC,lownoiseMar17,2000amplifier,quickchipAPPLICATIONNOTE644QuickChipDesignExample2LowPowerSiliconBJTLNAfor1.9GHzAbstract:Atwo-stage1.9GHzmonolithiclow-noiseamplifier(LNA)withameasurednoisefigureof2.3dBandanassociatedgainof15dBwasfabricatedinastandardsiliconbipolartransistorarray.Itdissipates5.2mWfroma3Vsupplyincludingthebiascircuitry.Inputreturnlossandisolationare-9dBand-20dB,respectively.1998IEEE.Reprinted,withpermission,from1998IEEEMicrowaveandGuidedWaveLetters,Vol.3,No.3,pp.136-137I.IntroductionInportablecommunicationequipment,suchascellular……
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    时间: 2019-12-24 22:04
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    上传者: 238112554_qq
    Abstract:MaximhastwodifferentapproachesfordevelopingHFASICs:asemi-customQuickChipdesignmethodologyandthemoretraditionalfull-customdesignmethodology.Thesemicustomdesignapproachisdiscussedbelowandprovidesalow-cost,fastturn-timeapproachfordevelopingcustomer-designedRFASICs.Maxim>AppNotes>ASICsKeywords:ASICs,QuickChip,RF,semicustom,custom,HF,asic,RFASICs,quickchip,semi-custom,full-Mar13,2000customAPPLICATIONNOTE646SemicustomQuickChipASICsImplementRFFunctionsto9GHzAbstract:MaximhastwodifferentapproachesfordevelopingHFASICs:asemi-customQuickChipdesignmethodologyandthemoretraditionalfull-customdesignmethodology.Thesemicustomdesignapproachisdiscussedbelowandprovidesalow-cost,fastturn-timeapproachfordevelopingcustomer-designedRFASICs.InadditiontostandardproductICs,Maximoffersarapid-responseASICservice.Semicustomarraysknownas"QuickChips"providedesignerswithaselectionofuncommittedsemiconductordevices:JFETs,Schottkydiodes,ESD-protecteddiodes,MOScapacitor……
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    时间: 2019-12-24 20:39
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    上传者: givh79_163.com
    【应用手册】Single-PortTriple-SpeedEthernetandOn-BoardPHYChipReferenceDesignThisapplicationnotedescribesSingle-PortTriple-SpeedEthernetandOn-BoardPHYChipreferencedesignsthatdemonstrateEthernetoperationsoftheAltera®Triple-SpeedEthernetMegaCore®functionswithon-boardMarvell88E1111PHYchips.Thereferencedesignsprovideflexibletestanddemonstrationplatformsonwhichyoucancontrol,test,andmonitortheEthernetoperationsusingsystemloopbacks.OnereferencedesignrunsintheArria®IIGXFPGAdevelopmentboardandintegratesoneinstanceofthemediaaccesscontroller(MAC)function.TheTriple-SpeedEthernetIPcoreconnectstotheon-boardPHYchipthroughReducedGigabitMediaIndependentInterface(RGMII).TheotherreferencedesignrunsintheStratix®IVGXFPGAdevelopmentboardandintegratesoneinstanceoftheMACwithphysicalcodingsublayer(PCS)andphysicalmediumattachment(PMA)functions.TheTriple-SpeedEthernetIPcoreconnectstotheon-boardPHYchipthroughSerialGigabitMediaIndependentInterface(SGMII)mode.Single-PortTriple-SpeedEthernetandOn-BoardPHYChipReferenceDesignAN-647-1.1ApplicationNoteThisapplicationnotedescribesSingle-PortTriple-SpeedEthernetandOn-BoardPHYChipreferencedesignsthatdemonstrateEthernetoperationsoftheAlteraTriple-SpeedEthernetMegaCorefunctionswithon-boardMarvell88E1111PHYchips.Thereferencedesignsprovideflexibletestanddemonstration……
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    时间: 2019-12-24 20:00
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    上传者: givh79_163.com
    公司通常购买的所有雇员的一种类型的电话。但是,这意味着每个林格有相同声音,并且当一个电话响了,十几人暂停,看看他们的电话。同样令人讨厌的是没有的视觉消息指示器,所以任何人如怀疑他们可能有一条消息,必须举起手机,听听特别消息音。Maxim>AppNotes>AudioCircuitsKeywords:ChipRecorderCustomizesPhoneRingerSep06,2002APPLICATIONNOTE1187ChipRecorderCustomizesPhoneRingerCompaniesusuallypurchaseonetypeoftelephoneforallemployees.Butthismeansthateveryringerhasthesamesoundandwhenonephonerings,adozenpeoplepauseandlookattheirtelephones.Equallyannoyingistheabsenceofavisualmessageindicator,soanyonewhosuspectstheymayhaveamessagemustliftthehandsetandlistenforaspecialmessagetone.Byplacingacircuitinserieswiththetelephone(Figure1),youcancustomizeaphoneringerwithoutmodifyingthephone.Theheartoftheringerisachip-recorderIC(U5)capableofplayingupto10secondsoftelep……
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    时间: 2019-12-24 18:21
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    摘要:本应用笔记提供了一个8MHz的系统使用Dallas半导体/马克西姆的SCT和成帧器不包含交错总线(IBO)的运作模式internally.TheDS2155,DS26528,DS26524,DS26522,DS26521的背板,复用的PCM流的要求,DS26519和DS26518中都含有国际文凭组织的功能,无需外部电路,并建议用于新设计。Maxim>AppNotes>COMMUNICATIONSCIRCUITSKeywords:T1,E1,T1/E1,8MHz,backplane,PCM,pulsecodemodulation,elasticstore,DS0,2.048MHz,May29,2001systemclock,framer,byteinterleaved,IBO,interleavebusoperation,SCTs,singlechiptransceiver,streamAPPLICATIONNOTE301LegacyT1/E18MHzBackplaneOperationAbstract:ThisapplicationnoteprovidestherequirementsformultiplexingfourPCMstreamsintoone8MHzsystembackplaneusingDallasSemiconductor/MaximSCTsandframersthatdonotcontaininterleavebusoperation(IBO)modesinternally.TheDS2155,DS26528,DS26524,DS26522,DS26521,DS26519andDS26518allcontainIBOfunctionalitywithoutexternalcircuitryandarerecommendedfornewdesigns.IntroductionThisapplicationnoteappliestothefollo……