原创 十进制计数器

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

USE IEEE.STD_LOGIC_ARITH.ALL;

USE IEEE.STD_LOGIC_UNSIGNED.ALL;

--*************************

ENTITY counter10 is

PORT(

CP:IN Std_Logic;

Qout: OUT STD_LOGIC_VECTOR( 3 DOWNTO 0)

);

END counter10;

--***************************

ARCHITECTURE demux4_behave OF counter10 IS

SIGNAL RST:STD_LOGIC;

SIGNAL QN:STD_LOGIC_VECTOR(3 DOWNTO 0);

BEGIN

proceSS(CP,RST)

BEGIN

IF RST='1'THEN

QN<="0000";

ELSIF CP'EVENT AND CP='1'THEN

QN<=QN+1;

END IF;

END PROCESS;

RST<='1'WHEN QN="10" ELSE

'0';

Qout<=QN;

END demux4_behave;