原创 FPGA典型电路之边缘检测电路

 2015-9-2 23:22  894 5 5 分类: FPGA/CPLD

边沿检测电路

边沿检测电路，包括上升沿、下降沿、双沿检测电路。在检测到所需要的边沿后产生一个高电平的脉冲。

module edge_detect
(
    input clk,
    input rst_n,
    input data_in,
    output raising_edge_detect,
    output falling_edge_detect,
    output double_edge_detect
);

reg data_in_d1;
reg data_in_d2;

always @ (posedge clk,negedge rst_n)
begin
    if(!rst_n)
        begin
            data_in_d1 <= 1'b0;
            data_in_d2 <= 1'b0;
        end 
    else
        begin
            data_in_d1 <= data_in;
            data_in_d2 <= data_in_d1;
        end 
end 

assign raising_edge_detect = data_in_d1  & (~data_in_d2);
assign falling_edge_detect = ~data_in_d1 &  data_in_d2;
assign double_edge_detect  = data_in_d1 ^ data_in_d2;

endmodule