原创 YLP2440 DAC测试

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1.设置ADCCON
enable A/D converter prescaler，即往[14]（PRSCEN）置一，设置 A/D converter prescaler value，[13:6]（PRSCVL），并选择Analog input channel select，[5:3]（SEL_MUX）。
其中A/D converter freq. = GCLK/(prescaler+1) = 1MHz
rADCCON = (1<<14)| (preScaler << 6) | ((ch&0x7) << 3);
2.Start ADC and check if ENABLE_START is low
ENABLE_START（[0]），A/D conversion starts by enable. If READ_START is enabled, this value is not valid.
0 = No operation
1 = A/D conversion starts and this bit is cleared after the start-up.
    rADCCON |= 0x1;
    while (rADCCON & 0x1);        //check if ENABLE_START is low
3.Check if ECFLG(End of Conversion flag) is high
ECFLG([15])——End of conversion flag(Read only)
0 = A/D conversion in process
1 = End of A/D conversion
    while (! (rADCCON & 0x8000) );    //check ECFLG
4.返回结果
ADCDAT0/1（[9:0]），XPDATA(Normal ADC)/YPDATA
return ((int)rADCDAT0 & 0x3ff);