原创 PCI声卡在DOS下的发声研究（二）、PC／PCI、分布式DMA、串行中断SIRQ

PCI声卡在DOS下的发声研究（二）、PC／PCI、分布式DMA、串行中断SIRQ

wxleasyland

2011.4

 

DOS下播放一段WAV音乐，需要这样：

在一段内存中读入数据

对DMA8237寄存器编程（DMA1通道）

写声卡220H口，启动DMA传送播放音乐

播放结束，声卡发出中断IRQ5

进入中断服务程序，对中断8259寄存器编程

重复以上，直到所有音乐播放完

可见，DMA1、IRQ5要正常，才能正常播放。不像FM音乐，只需要对I/O端口操作就行。

 

ISA声卡可以直接与IRQ控制器、DMA控制器通讯，所以播放没问题。

PCI声卡要兼容DOS，则要通过PCI的INTA#、或串行中断SIRQ来与IRQ控制器通讯，通过PC/PCI、或分布式DMA来与DMA控制器通讯。这样才能在DOS下播放。

 

所以在DOS下，PCI声卡要在硬件上能正常操作DMA1和IRQ5。与PCI总线、南桥芯片有关。 PCI协议太复杂了。所以没怎么搞懂。

 

《PCI 中断机制分析》：PCI 总线有四条中断线PINTA#~PINTD#,所有PCI 设备共同使用这四条线向系统申请中断,中断请求经“可编程中断路由器”路由到“可编程中断控制器”的某条中断请求输入脚IRQi ,再由中断控制器代理向CPU 申请中断,CPU 响应中断后,从中断入口表中取得入口或顺次入口链查得入口,再转入中断服务程序执行。

 

 

 

 

一、SB－LINK

主板或PCI声卡上的SB-LINK接头，信号见下面：有REQ#信号、GNT#信号和SIRQ信号，需要用电缆来将主板及PCI声卡连接起来。

注意：这里的REQ#是PC/PCI REQ#，GNT#是PC/PCI GNT#，不是PCI总线上的REQ#和GNT#！PCI总线上也有REQ#和GNT#针脚，不一样的东西！

南桥芯片最多支持PC/PCI REQ#和GNT#线对可以有3对。声卡只要用一对就可以了。

SIRQ是串行中断的信号线。在PCI总线上是没有这个信号的。

PC/PCI REQ#信号、GNT#信号和SIRQ应该是单独连接到南桥芯片上的。

 

 

二、82371AB南桥芯片有这些IRQ、DMA功能：

82371AB是PIIX4南桥芯片组，用在PENTIUM II的电脑上。

Interrupt Controller Based on Two 82C59

 15 Interrupt Support

 Independently Programmable for Edge/Level Sensitivity

Supports Optional I/O APIC

 Serial Interrupt Input  “串行化中断”输入

 

Enhanced DMA Controller

 Two 82C37 DMA Controllers

 Supports PCI DMA with 3 PC/PCI Channels and Distributed DMA Protocols (Simultaneously)  PC/PCI协议、分布式DMA协议

 Fast Type-F DMA for Reduced PCI Bus Usage

 

 

 

 

三、南桥82371AB芯片

The 82371AB PCI ISA IDE Xcelerator (PIIX4) is a multi-function PCI device implementing a PCI-to-ISA bridge function,   a PCI IDE function,  a Universal Serial Bus host/hub function, and an Enhanced Power Management function.

南桥芯片集成了  1个PCItoISA桥、 1个PCI IDE功能、 1个USB主控/集线器功能、 1个增强电源管理功能。

As a PCI-to-ISA bridge, PIIX4 integrates many common I/O functions found in ISA-based PC systems――two 82C37 DMA Controllers,   two 82C59 Interrupt Controllers,  an 82C54 Timer/Counter,  and a Real Time Clock.  

南桥芯片的PCItoISA桥中，带有2个82C37 DMA控制器、2个82C59中断控制器、 1个82C54时间计数器、1个实时时钟。

In addition to compatible transfers, each DMA channel supports Type F transfers.

PIIX4 also contains full support for both PC/PCI and Distributed DMA protocols implementing PCI-based DMA.  

实现PCI下的DMA有二种方法：PC/PCI协议、分布式DMA协议

The Interrupt Controller has Edge or Level sensitive programmable inputs and fully supports the use of an external I/O Advanced Programmable Interrupt Controller (APIC) and Serial Interrupts.   

Chip select decoding is provided for BIOS, Real Time Clock, Keyboard Controller, second external microcontroller, as well as two Programmable Chip Selects.

（1）南桥芯片对基于PCI的传统DMA的支持方法

The DMA controller supports two separate methods for handling legacy DMA via the PCI bus.  南桥DMA控制器支持二种方法 经由PCI总线 来处理传统的DMA，。

The PC/PCI protocol allows PCI-based peripherals to initiate DMA cycles by encoding requests and grants via three PC/PCI REQ#/GNT#  pairs.    

第一种方法：“PC/PCI协议”，允许PCI设备经由3个REQ#/GNT# 线对，通过编码“请求信号”和“确认信号”来去发起DMA周期。

 

The second method, Distributed DMA, allows reads and writes to 82C37 registers to be distributed to other PCI devices.   

第二种方法：“分布式DMA”，允许将“对82C37寄存器的读取和写入” 分发给其它PCI设备。

The two methods can be enabled concurrently. The serial interrupt scheme typically associated with Distributed DMA is also supported.

这二种方法可以同时存在。通常与“分布式DMA” 相关联的“串行化中断”也被支持。

 

（2）南桥芯片对传统中断的支持方法

PIIX4 provides an ISA-Compatible interrupt controller that incorporates the functionality of two 82C59 interrupt controllers.  The two interrupt controllers are cascaded so that 14 external and two internal interrupts are possible.  

In addition, PIIX4 supports a serial interrupt scheme.

PIIX4支持“串行化中断”方案。

PIIX4 provides full support for the use of an external IO APIC.

 

 

 

四、南桥82371AB芯片上的针脚

参见《82371AB PCI-TO-ISA IDE XCELERATOR (PIIX4) DATASHEET》PDF。

The DMA controller supports two separate methods for handling legacy DMA via the PCI bus.   The PC/PCI protocol allows PCI-based peripherals to initiate DMA cycles by encoding requests and grants via three PC/PCI REQ#/GNT# pairs.   The second method, Distributed DMA, allows reads and writes to 82C37 registers to be distributed to other PCI devices.   The two methods can be enabled concurrently.   The serial interrupt scheme typically associated with Distributed DMA is also supported.

82371AB上的DMA接口的针脚有：

DREQ[0,1,2,3]、DREQ[5,6,7]、DACK[0,1,2,3]#、DACK[5,6,7]#是传统DMA脚（DMA0~DMA7）。

REQ[A:C]#、GNT[A:C]#就是PC/PCI DMA脚，有A~C 3个线对。如果不使用PC/PCI，则这些脚可以用作通用输入输出口GPIO。

 

82371AB上的中断接口的针脚有：

IRQ 3:7, 9:11,14:15 是传统中断申请脚。

PIRQ[A:D]#  是PROGRAMMABLE INTERRUPT REQUEST （我注：就是PCI INTERRUPT REQUEST）. USB控制器使用PIRQ D＃。

SERIRQ就是串行中断请求脚。

APIC开头的是用于APIC。

PCI总线的PIRQ[A:D]#信号可以被路由给IRQ3~IRQ15!!!

8.6.8. INTERRUPT STEERING

PIIX4 can be programmed to allow four PCI programmable interrupts (PIRQ[A:D]#) to be internally routed to one of 11 interrupts IRQ[15,14,12:9,7:3].    PCLK is used to synchronize the PIRQx# inputs.   The PIRQx# lines are run through an internal multiplexer that assigns, or routes, an individual PIRQx# line to any one of 11 IRQ inputs.

The assignment is programmable through the PIRQx Route Control registers.    One or more PIRQx# lines can be routed to the same IRQx input.   If interrupt steering is not required, the Route Registers can be programmed to disable steering.

Bits [3:0] in each PIRQx Route Control register are used to route the associated PIRQx# line to an internal IRQ input.   Bit 7 in each register is used to disable routing of the associated PIRQx#.

4.1.10. PIRQRC[A:D]—PIRQX ROUTE CONTROL REGISTERS (FUNCTION 0)

Address Offset : 60h (PIRQRCA#)–63h (PIRQRCD#)

Default Value: 80h

Attribute: R/W

 

PC/PCI DMA和Distributed DMA在8.5章节有介绍。

PC/PCI DMA uses dedicated REQUEST and GRANT signals to permit PCI devices to request transfers associated with specific DMA channels.    Upon receiving a request and getting control of the PCI bus,  PIIX4 performs a two-cycle transfer.   For example, if data is to be moved from the peripheral to main memory, PIIX4 will first read data from the peripheral and then write it to main memory.  The location in main memory is the Current Address Registers in the 8237.  PIIX4 supports up to three PC/PCI REQ/GNT pairs.

Distributed DMA is based on monitoring CPU accesses to the 8237.  If the accesses are associated with DMA channels that are “distributed” (in some PCI peripheral), then PIIX4 collects or distributes the data before letting the CPU complete its accesses.   This way the CPU thinks that it is accessing a standard 8237-based design, even though the registers are not located in PIIX4.

串行中断的在8.7章节有介绍。

 

 

 

 

 

五、现在的南桥ICH芯片

 

ICH9南桥芯片，见PDF DATASHEET：有

Enhanced DMA Controller

—Two cascaded 8237 DMA controllers

—Supports LPC DMA

 

Interrupt Controller

—Supports up to eight PCI interrupt pins

—Supports PCI 2.3 Message Signaled Interrupts

—Two cascaded 82C59 with 15 interrupts

—Integrated I/O APIC capability with 24 interrupts

—Supports Processor System Bus interrupt delivery

 

SERIRQ 针脚是Serial Interrupt Request

PIRQ[D:A]# 针脚是PCI Interrupt Requests

PIRQ[H:E]# 针脚是PCI Interrupt Requests

In non-APIC mode the PIRQx# signals can be routed to interrupts 3, 4, 5, 6, 7, 9, 10, 11, 12, 14 or 15 as described in Section 5.8.6.    Each PIRQx# line has a separate Route Control register.

5.8.6 Steering PCI Interrupts

The ICH9 can be programmed to allow PIRQA#-PIRQH# to be routed internally to interrupts 3–7, 9–12, 14 or 15.   The assignment is programmable through the PIRQx Route Control registers, located at 60–63h and 68–6Bh in Device 31:Function 0.   One or more PIRQx# lines can be routed to the same IRQx input. If interrupt steering is not required, the Route registers can be programmed to disable steering.

非APIC模式下，PCI总线的PIRQx#信号可以被路由给IRQ3~IRQ15!!!

 

 

五、南桥ICH芯片支持吗

 

网上搜的INTEL的《Implementing Industry Standard Architecture (ISA) with Intel? Express Chipsets》中有这些内容：

2.1.1.1 Distributed DMA

Distributed DMA is not supported in any of Intel’s I/O Controller Hub variants. 

所有ICH南桥都不支持“分布式DMA”!

2.1.1.2 PC/PCI DMA

The PC/PCI DMA protocol is supported on all I/O Controller Hubs from ICH to ICH5 (excluding 6300ESB).  These parts have dedicated Request and Grant signals – REQ[A:B] and GNT[A:B] – to implement the hardware aspect of the protocol.

南桥ICH～ICH5支持PC/PCI DMA。

From ICH6 onwards these signals have been removed and, therefore, these devices no longer support the PC/PCI protocol.   As a result, it is no longer possible to support ISA DMA or Bus Master transactions using a PCI/ISA bridge. A system designer should be aware of this limitation before using such a bridge.

南桥ICH6及更高级的芯片不支持PC/PCI DMA了。

If a system designer does not require ISA DMA or Bus Master functionality then it may still be possible to use the PCI/ISA bridge without the presence of the PC/PCI Request and Grant signals.   It is recommended that a system designer works with the bridge vendor to understand if this approach is feasible.

 

我注：现在的电脑都是ICH南桥了，不支持分布式DMA和PC/PCI DMA，那PCI声卡就没有办法模拟传统声卡的DMA了，DOS下就不能用PCI声卡来播放WAV了！但仍可能通过捕获I/O端口，仍可以用388H来播放FM音效。

所以研究什么 分布式DMA、PC/PCI DMA，都没有什么意义了！！

 

 

 

 

 

六、声卡YMF724 DS-1芯片支持PC／PCI、分布式DMA、串行中断SIRQ

见YMF724的DATASHEET。

YMF724 DS-1芯片的中断针脚有INTA#、SERIRQ#、IRQ5~IRQ11。

支持PCI总线的中断INTA#、也支持串行化中断、也支持传统中断。

DMA针脚有PCREQ#、PCGNT#。

支持PC/PCI DMA，也支持分布式DMA。

 

DS-1 supports PC/PCI and D-DMA protocols to emulate the DMA of SB Pro on the PCI.   In addition, DS-1 supports the old type of interrupts used by ISA and the Serialized IRQ protocol.

Yamaha recommends the combination of PC/PCI and Serialized IRQ.  The system block diagram when using Intel 430TX chip set is shown below.

The PCI-to-ISA bridge needs to support PC/PCI.   IRQ is directly connected to the IRQ input pins on the PCI-to-ISA bridge.  南桥需要支持PC/PCI。 IRQ直接接到南桥的IRQ针脚上。

 

SB PRO模块可以使用PCI总线的中断INTA#、或串行化中断、或传统中断！这三种都可以用！

 

 

 

 

 

七、声卡ES1373芯片支持啥？？？

见ES1373的DATASHEET。

ES1373有所谓的AudioPCI 97控制芯片，可以提供传统功能的支持，而不需要用到ISA针脚。

AudioPCI 97 is the new ENSONIQ AC97 digital controller which provides the next generation of audio performance to the PC market.   

AudioPCI 97 is a 5.0 Volt PCI bus compatible device that enables the ENSONIQ SoundScape PCI solution.

AudioPCI 97 along with an AC97 CODEC offer the next generation of audio performance in a PC while maintaining full legacy compatibility without old ISA bus solutions.   

Some of the capabilities of AudioPCI 97 are:

· SoundScape WaveTable synthesizer .

· Full DOS Game Compatibility

· Multiple sample rate support

· PCI Bus Master for fast DMA

· Sounds are stored in Main memory.

· Access to Ensoniq’s World Famous Sound Library of over 4000 Sounds

· 3 Stereo inputs and 3 mono inputs can be mixed into the output stream.

· Direct I/O space access of the control registers.

· No ISA bus pins required

 

AudioPCI 97 essentially implements a 3 channel DMA controller. These virtual DMA channels are implemented via the CCB, PCI and Serial interface modules. CCB 就是Bus Master Cache Control (CCB)，this block is functionally equivalent to a 3 channel DMA controller.

AudioPCI 97实质上实现了一个3通道DMA控制器功能！！

The LEGACY subsystem is the circuitry required to perform SoundBlaster, OPL-FM and MPU-401 emulation.   Functionally AudioPCI 97 traps on access of the SoundBlaster registers and then issues the appropriate IRQ or SERR command on the PCI bus.   AudioPCI 97 handles the Legacy DMA function in a similar fashion. The exact functionality of the block cannot be fully disclosed at this time due to pending patent protection for the application of this technique. 

ES1373不需要PC/PCI、SIRQ等，就可以兼容传统DOS。如何实现的？这是专利技术，不能公开。

 

我想：

I/O端口模拟可以用V86捕获端口来实现。

IRQ可以用PCI 的中断线INTA#，再用南桥STEERING INTERRUPT（即路由中断）来实现。

DMA要如何实现呢？没有分布式DMA，没有PC/PCI。不清楚。 我想可以这样，I/O端口已经被捕获了，当发现程序在I/O端口写播放指令时，声卡的DOS驱动驻留程序就变通一下，找到DMA控制器的参数，得到声音数据所在的内存地址，再让声卡自行变成一个DMA主控（即主模式传输），去得到内存中的数据进行播放，播放完后声卡就发一个中断表示完成了，这样就实现了与传统DMA控制器的兼容。

 

 

七、PCI总线的DMA传输

《基于DSP的PCI总线高速DMA数据传输》：

对于基于DSP的PCI总线DMA数据传输主要有两种模式：

一种是从模式传输，使用PCI主机主板的DMA控制器；

另一种是主模式传输，使用PCI卡上DSP的DMA控制器。